From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDB4BC28CBC for ; Wed, 6 May 2020 20:27:32 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 23D342063A for ; Wed, 6 May 2020 20:27:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 23D342063A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49HSnY2wsYzDqw8 for ; Thu, 7 May 2020 06:27:29 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=ira.weiny@intel.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=intel.com Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49HSlF0DLNzDqdl for ; Thu, 7 May 2020 06:25:19 +1000 (AEST) IronPort-SDR: Q73+h2n4ev9e8qBe4i+pLNVKDUN6Aju2jTxZhJR8cmOPP1qk3JfOZJuDP4wdWnxT2kgOHK+WO/ NRPRl6EJqfjA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2020 13:25:15 -0700 IronPort-SDR: xSrhp4VCcSvP5bv2WtfYo6vFeSsnnsv3N44sSopWfpFOgIk9uc/zRJt3WrQM/g5MZyK9rPCoAV JVwDj2vxz4ng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,360,1583222400"; d="scan'208";a="461881349" Received: from iweiny-desk2.sc.intel.com ([10.3.52.147]) by fmsmga006.fm.intel.com with ESMTP; 06 May 2020 13:25:14 -0700 Date: Wed, 6 May 2020 13:25:14 -0700 From: Ira Weiny To: Christoph Hellwig Subject: Re: [PATCH V2 05/11] {x86,powerpc,microblaze}/kmap: Move preempt disable Message-ID: <20200506202514.GF1084880@iweiny-DESK2.sc.intel.com> References: <20200504010912.982044-1-ira.weiny@intel.com> <20200504010912.982044-6-ira.weiny@intel.com> <20200506061113.GA5192@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200506061113.GA5192@infradead.org> User-Agent: Mutt/1.11.1 (2018-12-01) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , Dave Hansen , dri-devel@lists.freedesktop.org, linux-mips@vger.kernel.org, "James E.J. Bottomley" , Max Filippov , Huang Rui , Paul Mackerras , "H. Peter Anvin" , sparclinux@vger.kernel.org, Dan Williams , Helge Deller , x86@kernel.org, linux-csky@vger.kernel.org, Ingo Molnar , linux-snps-arc@lists.infradead.org, linux-xtensa@linux-xtensa.org, Borislav Petkov , Andy Lutomirski , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Chris Zankel , Thomas Bogendoerfer , linux-parisc@vger.kernel.org, linux-kernel@vger.kernel.org, Christian Koenig , Andrew Morton , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, May 05, 2020 at 11:11:13PM -0700, Christoph Hellwig wrote: > On Sun, May 03, 2020 at 06:09:06PM -0700, ira.weiny@intel.com wrote: > > From: Ira Weiny > > > > During this kmap() conversion series we must maintain bisect-ability. > > To do this, kmap_atomic_prot() in x86, powerpc, and microblaze need to > > remain functional. > > > > Create a temporary inline version of kmap_atomic_prot within these > > architectures so we can rework their kmap_atomic() calls and then lift > > kmap_atomic_prot() to the core. > > > > Signed-off-by: Ira Weiny > > > > --- > > Changes from V1: > > New patch > > --- > > arch/microblaze/include/asm/highmem.h | 11 ++++++++++- > > arch/microblaze/mm/highmem.c | 10 ++-------- > > arch/powerpc/include/asm/highmem.h | 11 ++++++++++- > > arch/powerpc/mm/highmem.c | 9 ++------- > > arch/x86/include/asm/highmem.h | 11 ++++++++++- > > arch/x86/mm/highmem_32.c | 10 ++-------- > > 6 files changed, 36 insertions(+), 26 deletions(-) > > > > diff --git a/arch/microblaze/include/asm/highmem.h b/arch/microblaze/include/asm/highmem.h > > index 0c94046f2d58..ec9954b091e1 100644 > > --- a/arch/microblaze/include/asm/highmem.h > > +++ b/arch/microblaze/include/asm/highmem.h > > @@ -51,7 +51,16 @@ extern pte_t *pkmap_page_table; > > #define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT) > > #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) > > > > -extern void *kmap_atomic_prot(struct page *page, pgprot_t prot); > > +extern void *kmap_atomic_high_prot(struct page *page, pgprot_t prot); > > +void *kmap_atomic_prot(struct page *page, pgprot_t prot) > > Shouldn't this be marked inline? Yes Thanks. Done. > > The rest looks fine: > > Reviewed-by: Christoph Hellwig Thanks, Ira