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[216.228.112.21]) by smtp.gmail.com with ESMTPSA id c1sm6977123pfo.197.2020.06.12.12.29.54 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 12 Jun 2020 12:29:54 -0700 (PDT) Date: Fri, 12 Jun 2020 12:29:43 -0700 From: Nicolin Chen To: Shengjiu Wang Subject: Re: [PATCH] ASoC: fsl_ssi: Fix bclk calculation for mono channel Message-ID: <20200612192942.GA26587@Asurada-Nvidia> References: <1591690768-1691-1-git-send-email-shengjiu.wang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1591690768-1691-1-git-send-email-shengjiu.wang@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, timur@kernel.org, Xiubo.Lee@gmail.com, linuxppc-dev@lists.ozlabs.org, tiwai@suse.com, perex@perex.cz, broonie@kernel.org, festevam@gmail.com, linux-kernel@vger.kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Jun 09, 2020 at 04:19:28PM +0800, Shengjiu Wang wrote: > For mono channel, ssi will switch to normal mode. In normal > mode, the Word Length Control bits control the word length > divider in clock generator, which is different with I2S master > mode, the word length is fixed to 32bit. > > So we refine the famula for mono channel, otherwise there > will be sound issue for S24_LE. > > Fixes: b0a7043d5c2c ("ASoC: fsl_ssi: Caculate bit clock rate using slot number and width") > Signed-off-by: Shengjiu Wang > --- > sound/soc/fsl/fsl_ssi.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c > index bad89b0d129e..e347776590f7 100644 > --- a/sound/soc/fsl/fsl_ssi.c > +++ b/sound/soc/fsl/fsl_ssi.c > @@ -695,6 +695,11 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream, > /* Generate bit clock based on the slot number and slot width */ > freq = slots * slot_width * params_rate(hw_params); > > + /* The slot_width is not fixed to 32 for normal mode */ > + if (params_channels(hw_params) == 1) This function has a local variable that you can reuse here: unsigned int slots = params_channels(hw_params); > + freq = (slots <= 1 ? 2 : slots) * params_width(hw_params) * > + params_rate(hw_params); We have a small section of slots and slot_width calculation at the top of this function where we can squash these in.