* [PATCH] powerpc: Update documentation of ISA versions for Power10
@ 2020-08-25 11:45 Jordan Niethe
2020-08-25 12:41 ` Gabriel Paubert
0 siblings, 1 reply; 3+ messages in thread
From: Jordan Niethe @ 2020-08-25 11:45 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jordan Niethe
Update the CPU to ISA Version Mapping document to include Power10 and
ISA v3.1.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
Documentation/powerpc/isa-versions.rst | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst
index a363d8c1603c..72aff1eaaea1 100644
--- a/Documentation/powerpc/isa-versions.rst
+++ b/Documentation/powerpc/isa-versions.rst
@@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions.
========= ====================================================================
CPU Architecture version
========= ====================================================================
+Power10 Power ISA v3.1
Power9 Power ISA v3.0B
Power8 Power ISA v2.07
Power7 Power ISA v2.06
@@ -32,6 +33,7 @@ Key Features
========== ==================
CPU VMX (aka. Altivec)
========== ==================
+Power10 Yes
Power9 Yes
Power8 Yes
Power7 Yes
@@ -47,6 +49,7 @@ PPC970 Yes
========== ====
CPU VSX
========== ====
+Power10 Yes
Power9 Yes
Power8 Yes
Power7 Yes
@@ -62,6 +65,7 @@ PPC970 No
========== ====================================
CPU Transactional Memory
========== ====================================
+Power10 Yes
Power9 Yes (* see transactional_memory.txt)
Power8 Yes
Power7 No
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] powerpc: Update documentation of ISA versions for Power10
2020-08-25 11:45 [PATCH] powerpc: Update documentation of ISA versions for Power10 Jordan Niethe
@ 2020-08-25 12:41 ` Gabriel Paubert
2020-08-25 13:18 ` Jordan Niethe
0 siblings, 1 reply; 3+ messages in thread
From: Gabriel Paubert @ 2020-08-25 12:41 UTC (permalink / raw)
To: Jordan Niethe; +Cc: linuxppc-dev
On Tue, Aug 25, 2020 at 09:45:07PM +1000, Jordan Niethe wrote:
> Update the CPU to ISA Version Mapping document to include Power10 and
> ISA v3.1.
>
> Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
> ---
> Documentation/powerpc/isa-versions.rst | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst
> index a363d8c1603c..72aff1eaaea1 100644
> --- a/Documentation/powerpc/isa-versions.rst
> +++ b/Documentation/powerpc/isa-versions.rst
> @@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions.
> ========= ====================================================================
> CPU Architecture version
> ========= ====================================================================
> +Power10 Power ISA v3.1
> Power9 Power ISA v3.0B
> Power8 Power ISA v2.07
> Power7 Power ISA v2.06
> @@ -32,6 +33,7 @@ Key Features
> ========== ==================
> CPU VMX (aka. Altivec)
> ========== ==================
> +Power10 Yes
> Power9 Yes
> Power8 Yes
> Power7 Yes
> @@ -47,6 +49,7 @@ PPC970 Yes
> ========== ====
> CPU VSX
> ========== ====
> +Power10 Yes
> Power9 Yes
> Power8 Yes
> Power7 Yes
> @@ -62,6 +65,7 @@ PPC970 No
> ========== ====================================
> CPU Transactional Memory
> ========== ====================================
> +Power10 Yes
> Power9 Yes (* see transactional_memory.txt)
> Power8 Yes
> Power7 No
Huh?
Transactional memory has been removed from the architecture for Power10.
Gabriel
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] powerpc: Update documentation of ISA versions for Power10
2020-08-25 12:41 ` Gabriel Paubert
@ 2020-08-25 13:18 ` Jordan Niethe
0 siblings, 0 replies; 3+ messages in thread
From: Jordan Niethe @ 2020-08-25 13:18 UTC (permalink / raw)
To: Gabriel Paubert; +Cc: linuxppc-dev
On Tue, Aug 25, 2020 at 10:41 PM Gabriel Paubert <paubert@iram.es> wrote:
>
> On Tue, Aug 25, 2020 at 09:45:07PM +1000, Jordan Niethe wrote:
> > Update the CPU to ISA Version Mapping document to include Power10 and
> > ISA v3.1.
> >
> > Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
> > ---
> > Documentation/powerpc/isa-versions.rst | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst
> > index a363d8c1603c..72aff1eaaea1 100644
> > --- a/Documentation/powerpc/isa-versions.rst
> > +++ b/Documentation/powerpc/isa-versions.rst
> > @@ -7,6 +7,7 @@ Mapping of some CPU versions to relevant ISA versions.
> > ========= ====================================================================
> > CPU Architecture version
> > ========= ====================================================================
> > +Power10 Power ISA v3.1
> > Power9 Power ISA v3.0B
> > Power8 Power ISA v2.07
> > Power7 Power ISA v2.06
> > @@ -32,6 +33,7 @@ Key Features
> > ========== ==================
> > CPU VMX (aka. Altivec)
> > ========== ==================
> > +Power10 Yes
> > Power9 Yes
> > Power8 Yes
> > Power7 Yes
> > @@ -47,6 +49,7 @@ PPC970 Yes
> > ========== ====
> > CPU VSX
> > ========== ====
> > +Power10 Yes
> > Power9 Yes
> > Power8 Yes
> > Power7 Yes
> > @@ -62,6 +65,7 @@ PPC970 No
> > ========== ====================================
> > CPU Transactional Memory
> > ========== ====================================
> > +Power10 Yes
> > Power9 Yes (* see transactional_memory.txt)
> > Power8 Yes
> > Power7 No
>
> Huh?
>
> Transactional memory has been removed from the architecture for Power10.
Yeah you're right, I confused myself looking at CPU_FTRS_POWER10...
#define CPU_FTRS_POWER10 (CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
CPU_FTR_DSCR | \
CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_ARCH_31 | \
CPU_FTR_DAWR | CPU_FTR_DAWR1)
CPU_FTR_TM_COMP should not be in there.
>
> Gabriel
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-08-25 11:45 [PATCH] powerpc: Update documentation of ISA versions for Power10 Jordan Niethe
2020-08-25 12:41 ` Gabriel Paubert
2020-08-25 13:18 ` Jordan Niethe
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