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Thu, 10 Sep 2020 10:58:05 -0700 (PDT) Received: (nullmailer pid 595458 invoked by uid 1000); Thu, 10 Sep 2020 17:58:04 -0000 Date: Thu, 10 Sep 2020 11:58:04 -0600 From: Rob Herring To: Zhiqiang Hou Subject: Re: [PATCHv7 02/12] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Message-ID: <20200910175804.GA592152@bogus> References: <20200811095441.7636-1-Zhiqiang.Hou@nxp.com> <20200811095441.7636-3-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200811095441.7636-3-Zhiqiang.Hou@nxp.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, Xiaowei Bao , roy.zang@nxp.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, leoyang.li@nxp.com, minghuan.Lian@nxp.com, jingoohan1@gmail.com, andrew.murray@arm.com, mingkai.hu@nxp.com, gustavo.pimentel@synopsys.com, bhelgaas@google.com, shawnguo@kernel.org, kishon@ti.com, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Aug 11, 2020 at 05:54:31PM +0800, Zhiqiang Hou wrote: > From: Xiaowei Bao > > Add the doorbell mode of MSI-X in DWC EP driver. > > Signed-off-by: Xiaowei Bao > Reviewed-by: Andrew Murray > Signed-off-by: Hou Zhiqiang > --- > V7: > - Rebase the patch without functionality change. > > drivers/pci/controller/dwc/pcie-designware-ep.c | 14 ++++++++++++++ > drivers/pci/controller/dwc/pcie-designware.h | 12 ++++++++++++ > 2 files changed, 26 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index e5bd3a5ef380..e76b504ed465 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -471,6 +471,20 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, > return 0; > } > > +int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 func_no, return void. It never has an error. It could also just be an inline function. > + u16 interrupt_num) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > + u32 msg_data; > + > + msg_data = (func_no << PCIE_MSIX_DOORBELL_PF_SHIFT) | > + (interrupt_num - 1); > + > + dw_pcie_writel_dbi(pci, PCIE_MSIX_DOORBELL, msg_data); > + > + return 0; > +} > + > int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > u16 interrupt_num) > { > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 89f8271ec5ee..745b4938225a 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -97,6 +97,9 @@ > #define PCIE_MISC_CONTROL_1_OFF 0x8BC > #define PCIE_DBI_RO_WR_EN BIT(0) > > +#define PCIE_MSIX_DOORBELL 0x948 > +#define PCIE_MSIX_DOORBELL_PF_SHIFT 24 > + > #define PCIE_PL_CHK_REG_CONTROL_STATUS 0xB20 > #define PCIE_PL_CHK_REG_CHK_REG_START BIT(0) > #define PCIE_PL_CHK_REG_CHK_REG_CONTINUOUS BIT(1) > @@ -434,6 +437,8 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, > u8 interrupt_num); > int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > u16 interrupt_num); > +int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 func_no, > + u16 interrupt_num); > void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar); > #else > static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) > @@ -475,6 +480,13 @@ static inline int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > return 0; > } > > +static inline int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, > + u8 func_no, > + u16 interrupt_num) > +{ > + return 0; > +} > + > static inline void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) > { > } > -- > 2.17.1 >