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Date: Wed, 21 Oct 2020 14:23:28 +0530 Message-Id: <20201021085329.384535-4-maddy@linux.ibm.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201021085329.384535-1-maddy@linux.ibm.com> References: <20201021085329.384535-1-maddy@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.737 definitions=2020-10-21_03:2020-10-20, 2020-10-21 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_spam_definite policy=outbound score=100 bulkscore=0 impostorscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 spamscore=0 malwarescore=0 phishscore=0 clxscore=1015 mlxlogscore=681 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2010210065 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: atrajeev@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, Madhavan Srinivasan Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Athira Rajeev By setting exclude_kernel for user space profiling, we set the freeze bits in Monitor Mode Control Register. Due to hardware limitation, sometimes, Sampled Instruction Address register (SIAR) captures kernel address even when counter freeze bits are set in Monitor Mode Control Register (MMCR2). Patch adds a check to drop these samples at such conditions. Signed-off-by: Athira Rajeev Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/core-book3s.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index 6be0349e01ad..e675c7c8ce0e 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -2142,6 +2142,18 @@ static void record_and_restart(struct perf_event *event, unsigned long val, local64_set(&event->hw.period_left, left); perf_event_update_userpage(event); + /* + * Setting exclude_kernel will only freeze the + * Performance Monitor counters and we may have + * kernel address captured in SIAR. Hence drop + * the kernel sample captured during user space + * profiling. Setting `record` to zero will also + * make sure event throlling is handled. + */ + if (event->attr.exclude_kernel && record) + if (is_kernel_addr(mfspr(SPRN_SIAR))) + record = 0; + /* * Finally record data if requested. */ -- 2.26.2