From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0361AC2D0A3 for ; Thu, 29 Oct 2020 20:53:53 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 02E3620738 for ; Thu, 29 Oct 2020 20:53:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="VwKBRazZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 02E3620738 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4CMd2j57z1zDqKg for ; Fri, 30 Oct 2020 07:53:49 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=198.145.29.99; helo=mail.kernel.org; envelope-from=jic23@kernel.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=VwKBRazZ; dkim-atps=neutral Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4CMSyV5Z9LzDqYn for ; Fri, 30 Oct 2020 01:49:31 +1100 (AEDT) Received: from archlinux (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 029F1206E3; Thu, 29 Oct 2020 14:49:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603982968; bh=1M8zHKAHm8tfB8AOV5kFGjQ5L8HBiwt2lqvdGfEDgxQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=VwKBRazZTJNx5ayevPifAIJt6BcELHVSflPv1Pz3hhkIRLQu/hpqVx9zq6UOPHYwi 1Cr/eBqf+UTruLweRPs1uluGBSsUp8XS5oIZwMoDI9YYtGpTUHifWPeFkCnRe78Q3+ 9acepxXtiAj1lspr5f5lKQxsgHU3+k3h2anx8nNM= Date: Thu, 29 Oct 2020 14:49:12 +0000 From: Jonathan Cameron To: Mauro Carvalho Chehab Subject: Re: [PATCH 20/33] docs: ABI: testing: make the files compatible with ReST output Message-ID: <20201029144912.3c0a239b@archlinux> In-Reply-To: <4ebaaa0320101479e392ce2db4b62e24fdf15ef1.1603893146.git.mchehab+huawei@kernel.org> References: <4ebaaa0320101479e392ce2db4b62e24fdf15ef1.1603893146.git.mchehab+huawei@kernel.org> X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Mailman-Approved-At: Fri, 30 Oct 2020 07:50:44 +1100 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Gautham R. Shenoy" , "Jason A. Donenfeld" , Heikki Krogerus , Peter Meerwald-Stadler , Petr Mladek , Linux Doc Mailing List , Alexander Shishkin , Nayna Jain , Alexandre Belloni , Mimi Zohar , Sebastian Reichel , Guenter Roeck , Bruno Meneguele , Vishal Verma , Pavel Machek , Hanjun Guo , Mauro Carvalho Chehab , netdev@vger.kernel.org, Oleh Kravchenko , Dan Williams , Andrew Donnellan , Javier =?UTF-8?B?R29uesOhbGV6?= , Fabrice Gasnier , Stefano Stabellini , linux-acpi@vger.kernel.org, Jonathan Corbet , Chunyan Zhang , Mario Limonciello , linux-stm32@st-md-mailman.stormreply.com, Lakshmi Ramasubramanian , Ludovic Desroches , Pawan Gupta , linux-arm-kernel@lists.infradead.org, Frederic Barrat , Niklas Cassel , Len Brown , Juergen Gross , Mika Westerberg , Alexandre Torgue , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Cochran , linuxppc-dev@lists.ozlabs.org, Baolin Wang , Lars-Peter Clausen , Dan Murphy , Orson Zhai , Philippe Bergheaud , xen-devel@lists.xenproject.org, Boris Ostrovsky , Andy Shevchenko , Benson Leung , Konstantin Khlebnikov , Jens Axboe , Felipe Balbi , Kranthi Kuntala , "Martin K. Petersen" , linux-mm@kvack.org, Greg Kroah-Hartman , linux-usb@vger.kernel.org, "Rafael J. Wysocki" , Nicolas Ferre , linux-iio@vger.kernel.org, Thinh Nguyen , Sergey Senozhatsky , Thomas Gleixner , Leonid Maksymchuk , Maxime Coquelin , Johannes Thumshirn , Enric Balletbo i Serra , Vineela Tummalapalli , Peter Rosin , Mike Kravetz Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, 28 Oct 2020 15:23:18 +0100 Mauro Carvalho Chehab wrote: > From: Mauro Carvalho Chehab > > Some files over there won't parse well by Sphinx. > > Fix them. > > Signed-off-by: Mauro Carvalho Chehab > Signed-off-by: Mauro Carvalho Chehab Query below... I'm going to guess a rebase issue? Other than that Acked-by: Jonathan Cameron # for IIO > diff --git a/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 > index b7259234ad70..a10a4de3e5fe 100644 > --- a/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 > +++ b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 > @@ -3,67 +3,85 @@ KernelVersion: 4.11 > Contact: benjamin.gaignard@st.com > Description: > Reading returns the list possible master modes which are: > - - "reset" : The UG bit from the TIMx_EGR register is > + > + > + - "reset" > + The UG bit from the TIMx_EGR register is > used as trigger output (TRGO). > - - "enable" : The Counter Enable signal CNT_EN is used > + - "enable" > + The Counter Enable signal CNT_EN is used > as trigger output. > - - "update" : The update event is selected as trigger output. > + - "update" > + The update event is selected as trigger output. > For instance a master timer can then be used > as a prescaler for a slave timer. > - - "compare_pulse" : The trigger output send a positive pulse > - when the CC1IF flag is to be set. > - - "OC1REF" : OC1REF signal is used as trigger output. > - - "OC2REF" : OC2REF signal is used as trigger output. > - - "OC3REF" : OC3REF signal is used as trigger output. > - - "OC4REF" : OC4REF signal is used as trigger output. > + - "compare_pulse" > + The trigger output send a positive pulse > + when the CC1IF flag is to be set. > + - "OC1REF" > + OC1REF signal is used as trigger output. > + - "OC2REF" > + OC2REF signal is used as trigger output. > + - "OC3REF" > + OC3REF signal is used as trigger output. > + - "OC4REF" > + OC4REF signal is used as trigger output. > + > Additional modes (on TRGO2 only): > - - "OC5REF" : OC5REF signal is used as trigger output. > - - "OC6REF" : OC6REF signal is used as trigger output. > + > + - "OC5REF" > + OC5REF signal is used as trigger output. > + - "OC6REF" > + OC6REF signal is used as trigger output. > - "compare_pulse_OC4REF": > - OC4REF rising or falling edges generate pulses. > + OC4REF rising or falling edges generate pulses. > - "compare_pulse_OC6REF": > - OC6REF rising or falling edges generate pulses. > + OC6REF rising or falling edges generate pulses. > - "compare_pulse_OC4REF_r_or_OC6REF_r": > - OC4REF or OC6REF rising edges generate pulses. > + OC4REF or OC6REF rising edges generate pulses. > - "compare_pulse_OC4REF_r_or_OC6REF_f": > - OC4REF rising or OC6REF falling edges generate pulses. > + OC4REF rising or OC6REF falling edges generate > + pulses. > - "compare_pulse_OC5REF_r_or_OC6REF_r": > - OC5REF or OC6REF rising edges generate pulses. > + OC5REF or OC6REF rising edges generate pulses. > - "compare_pulse_OC5REF_r_or_OC6REF_f": > - OC5REF rising or OC6REF falling edges generate pulses. > + OC5REF rising or OC6REF falling edges generate > + pulses. > > - +-----------+ +-------------+ +---------+ > - | Prescaler +-> | Counter | +-> | Master | TRGO(2) > - +-----------+ +--+--------+-+ |-> | Control +--> > - | | || +---------+ > - +--v--------+-+ OCxREF || +---------+ > - | Chx compare +----------> | Output | ChX > - +-----------+-+ | | Control +--> > - . | | +---------+ > - . | | . > - +-----------v-+ OC6REF | . > - | Ch6 compare +---------+> > - +-------------+ > + :: > > - Example with: "compare_pulse_OC4REF_r_or_OC6REF_r": > + +-----------+ +-------------+ +---------+ > + | Prescaler +-> | Counter | +-> | Master | TRGO(2) > + +-----------+ +--+--------+-+ |-> | Control +--> > + | | || +---------+ > + +--v--------+-+ OCxREF || +---------+ > + | Chx compare +----------> | Output | ChX > + +-----------+-+ | | Control +--> > + . | | +---------+ > + . | | . > + +-----------v-+ OC6REF | . > + | Ch6 compare +---------+> > + +-------------+ > > - X > - X X > - X . . X > - X . . X > - X . . X > - count X . . . . X > - . . . . > - . . . . > - +---------------+ > - OC4REF | . . | > - +-+ . . +-+ > - . +---+ . > - OC6REF . | | . > - +-------+ +-------+ > - +-+ +-+ > - TRGO2 | | | | > - +-+ +---+ +---------+ > + Example with: "compare_pulse_OC4REF_r_or_OC6REF_r":: > + > + X > + X X > + X . . X > + X . . X > + X . . X > + count X . . . . X > + . . . . > + . . . . > + +---------------+ > + OC4REF | . . | > + +-+ . . +-+ > + . +---+ . > + OC6REF . | | . > + +-------+ +-------+ > + +-+ +-+ > + TRGO2 | | | | > + +-+ +---+ +---------+ > > What: /sys/bus/iio/devices/triggerX/master_mode > KernelVersion: 4.11 > @@ -91,6 +109,30 @@ Description: > When counting down the counter start from preset value > and fire event when reach 0. > Where did these come from? > +What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available > +KernelVersion: 4.12 > +Contact: benjamin.gaignard@st.com > +Description: > + Reading returns the list possible quadrature modes. > + > +What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode > +KernelVersion: 4.12 > +Contact: benjamin.gaignard@st.com > +Description: > + Configure the device counter quadrature modes: > + > + channel_A: > + Encoder A input servers as the count input and B as > + the UP/DOWN direction control input. > + > + channel_B: > + Encoder B input serves as the count input and A as > + the UP/DOWN direction control input. > + > + quadrature: > + Encoder A and B inputs are mixed to get direction > + and count with a scale of 0.25. > + > What: /sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available > KernelVersion: 4.12 > Contact: benjamin.gaignard@st.com > @@ -104,6 +146,7 @@ Description: > Configure the device counter enable modes, in all case > counting direction is set by in_count0_count_direction > attribute and the counter is clocked by the internal clock. > + > always: > Counter is always ON. >