From: Bharata B Rao <bharata@linux.ibm.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: farosas@linux.ibm.com, aneesh.kumar@linux.ibm.com,
npiggin@gmail.com, kvm-ppc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v4 1/3] powerpc/book3s64/radix/tlb: tlbie primitives for process-scoped invalidations from guests
Date: Mon, 22 Feb 2021 11:55:30 +0530 [thread overview]
Message-ID: <20210222062530.GA3672042@in.ibm.com> (raw)
In-Reply-To: <YCxiUCm/UCJJGOJD@yekko.fritz.box>
On Wed, Feb 17, 2021 at 11:24:48AM +1100, David Gibson wrote:
> On Mon, Feb 15, 2021 at 12:05:40PM +0530, Bharata B Rao wrote:
> > H_RPT_INVALIDATE hcall needs to perform process scoped tlbie
> > invalidations of L1 and nested guests from L0. This needs RS register
> > for TLBIE instruction to contain both PID and LPID. Introduce
> > primitives that execute tlbie instruction with both PID
> > and LPID set in prepartion for H_RPT_INVALIDATE hcall.
> >
> > While we are here, move RIC_FLUSH definitions to header file
> > and introduce helper rpti_pgsize_to_psize() that will be needed
> > by the upcoming hcall.
> >
> > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> > ---
> > .../include/asm/book3s/64/tlbflush-radix.h | 18 +++
> > arch/powerpc/mm/book3s64/radix_tlb.c | 122 +++++++++++++++++-
> > 2 files changed, 136 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > index 94439e0cefc9..aace7e9b2397 100644
> > --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
> > @@ -4,6 +4,10 @@
> >
> > #include <asm/hvcall.h>
> >
> > +#define RIC_FLUSH_TLB 0
> > +#define RIC_FLUSH_PWC 1
> > +#define RIC_FLUSH_ALL 2
> > +
> > struct vm_area_struct;
> > struct mm_struct;
> > struct mmu_gather;
> > @@ -21,6 +25,20 @@ static inline u64 psize_to_rpti_pgsize(unsigned long psize)
> > return H_RPTI_PAGE_ALL;
> > }
> >
> > +static inline int rpti_pgsize_to_psize(unsigned long page_size)
> > +{
> > + if (page_size == H_RPTI_PAGE_4K)
> > + return MMU_PAGE_4K;
> > + if (page_size == H_RPTI_PAGE_64K)
> > + return MMU_PAGE_64K;
> > + if (page_size == H_RPTI_PAGE_2M)
> > + return MMU_PAGE_2M;
> > + if (page_size == H_RPTI_PAGE_1G)
> > + return MMU_PAGE_1G;
> > + else
> > + return MMU_PAGE_64K; /* Default */
> > +}
>
> Would it make sense to put the H_RPT_PAGE_ tags into the
> mmu_psize_defs table and scan that here, rather than open coding the
> conversion?
I will give this a try and see how it looks.
Otherwise the changes in the patch which are mainly about
introducing primitives that require to set both PID and LPID
for tlbie instruction - do they look right?
Regards,
Bharata.
next prev parent reply other threads:[~2021-02-22 6:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-15 6:35 [PATCH v4 0/3] Support for H_RPT_INVALIDATE in PowerPC KVM Bharata B Rao
2021-02-15 6:35 ` [PATCH v4 1/3] powerpc/book3s64/radix/tlb: tlbie primitives for process-scoped invalidations from guests Bharata B Rao
2021-02-15 13:10 ` kernel test robot
2021-02-17 0:24 ` David Gibson
2021-02-22 6:25 ` Bharata B Rao [this message]
2021-02-15 6:35 ` [PATCH v4 2/3] KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE Bharata B Rao
2021-02-17 0:38 ` David Gibson
2021-02-22 6:46 ` Bharata B Rao
2021-02-22 23:26 ` David Gibson
2021-02-15 6:35 ` [PATCH v4 3/3] KVM: PPC: Book3S HV: Use H_RPT_INVALIDATE in nested KVM Bharata B Rao
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