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Mon, 22 Feb 2021 06:25:34 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D0E3DA4040; Mon, 22 Feb 2021 06:25:32 +0000 (GMT) Received: from in.ibm.com (unknown [9.85.69.50]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Mon, 22 Feb 2021 06:25:32 +0000 (GMT) Date: Mon, 22 Feb 2021 11:55:30 +0530 From: Bharata B Rao To: David Gibson Subject: Re: [PATCH v4 1/3] powerpc/book3s64/radix/tlb: tlbie primitives for process-scoped invalidations from guests Message-ID: <20210222062530.GA3672042@in.ibm.com> References: <20210215063542.3642366-1-bharata@linux.ibm.com> <20210215063542.3642366-2-bharata@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-02-21_14:2021-02-18, 2021-02-21 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 phishscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 mlxlogscore=943 mlxscore=0 bulkscore=0 impostorscore=0 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2102220055 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: bharata@linux.ibm.com Cc: farosas@linux.ibm.com, aneesh.kumar@linux.ibm.com, npiggin@gmail.com, kvm-ppc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Feb 17, 2021 at 11:24:48AM +1100, David Gibson wrote: > On Mon, Feb 15, 2021 at 12:05:40PM +0530, Bharata B Rao wrote: > > H_RPT_INVALIDATE hcall needs to perform process scoped tlbie > > invalidations of L1 and nested guests from L0. This needs RS register > > for TLBIE instruction to contain both PID and LPID. Introduce > > primitives that execute tlbie instruction with both PID > > and LPID set in prepartion for H_RPT_INVALIDATE hcall. > > > > While we are here, move RIC_FLUSH definitions to header file > > and introduce helper rpti_pgsize_to_psize() that will be needed > > by the upcoming hcall. > > > > Signed-off-by: Bharata B Rao > > --- > > .../include/asm/book3s/64/tlbflush-radix.h | 18 +++ > > arch/powerpc/mm/book3s64/radix_tlb.c | 122 +++++++++++++++++- > > 2 files changed, 136 insertions(+), 4 deletions(-) > > > > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h > > index 94439e0cefc9..aace7e9b2397 100644 > > --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h > > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h > > @@ -4,6 +4,10 @@ > > > > #include > > > > +#define RIC_FLUSH_TLB 0 > > +#define RIC_FLUSH_PWC 1 > > +#define RIC_FLUSH_ALL 2 > > + > > struct vm_area_struct; > > struct mm_struct; > > struct mmu_gather; > > @@ -21,6 +25,20 @@ static inline u64 psize_to_rpti_pgsize(unsigned long psize) > > return H_RPTI_PAGE_ALL; > > } > > > > +static inline int rpti_pgsize_to_psize(unsigned long page_size) > > +{ > > + if (page_size == H_RPTI_PAGE_4K) > > + return MMU_PAGE_4K; > > + if (page_size == H_RPTI_PAGE_64K) > > + return MMU_PAGE_64K; > > + if (page_size == H_RPTI_PAGE_2M) > > + return MMU_PAGE_2M; > > + if (page_size == H_RPTI_PAGE_1G) > > + return MMU_PAGE_1G; > > + else > > + return MMU_PAGE_64K; /* Default */ > > +} > > Would it make sense to put the H_RPT_PAGE_ tags into the > mmu_psize_defs table and scan that here, rather than open coding the > conversion? I will give this a try and see how it looks. Otherwise the changes in the patch which are mainly about introducing primitives that require to set both PID and LPID for tlbie instruction - do they look right? Regards, Bharata.