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[58.6.239.121]) by smtp.gmail.com with ESMTPSA id m5sm1348982pfd.96.2021.03.05.07.07.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 07:07:14 -0800 (PST) From: Nicholas Piggin To: kvm-ppc@vger.kernel.org Subject: [PATCH v3 08/41] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR Date: Sat, 6 Mar 2021 01:06:05 +1000 Message-Id: <20210305150638.2675513-9-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20210305150638.2675513-1-npiggin@gmail.com> References: <20210305150638.2675513-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabiano Rosas , linuxppc-dev@lists.ozlabs.org, Nicholas Piggin , Daniel Axtens Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Rather than add the ME bit to the MSR when the guest is entered, make it clear that the hypervisor does not allow the guest to clear the bit. The ME addition is kept in the code for now, but a future patch will warn if it's not present. Reviewed-by: Daniel Axtens Reviewed-by: Fabiano Rosas Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv_builtin.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c index 158d309b42a3..5e199fd6769a 100644 --- a/arch/powerpc/kvm/book3s_hv_builtin.c +++ b/arch/powerpc/kvm/book3s_hv_builtin.c @@ -662,6 +662,12 @@ static void kvmppc_end_cede(struct kvm_vcpu *vcpu) void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) { + /* + * Guest must always run with machine check interrupt + * enabled. + */ + msr |= MSR_ME; + /* * Check for illegal transactional state bit combination * and if we find it, force the TS field to a safe state. -- 2.23.0