From: kernel test robot <lkp@intel.com>
To: Nicholas Piggin <npiggin@gmail.com>, kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, kbuild-all@lists.01.org,
"Cédric Le Goater" <clg@kaod.org>,
"Nicholas Piggin" <npiggin@gmail.com>
Subject: Re: [PATCH v5 41/48] KVM: PPC: Book3S HV: Remove unused nested HV tests in XICS emulation
Date: Fri, 2 Apr 2021 23:28:09 +0800 [thread overview]
Message-ID: <202104022310.qAxmPySg-lkp@intel.com> (raw)
In-Reply-To: <20210401150325.442125-42-npiggin@gmail.com>
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Hi Nicholas,
I love your patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on v5.12-rc5 next-20210401]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Nicholas-Piggin/KVM-PPC-Book3S-C-ify-the-P9-entry-exit-code/20210401-232743
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc64-randconfig-s032-20210402 (attached as .config)
compiler: powerpc64le-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-279-g6d5d9b42-dirty
# https://github.com/0day-ci/linux/commit/53519e6ae0f84e2742b886a08598648b424e6f08
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Nicholas-Piggin/KVM-PPC-Book3S-C-ify-the-P9-entry-exit-code/20210401-232743
git checkout 53519e6ae0f84e2742b886a08598648b424e6f08
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=powerpc64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
arch/powerpc/kvm/book3s_hv_builtin.c:417:41: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] *out_xirr @@ got restricted __be32 * @@
arch/powerpc/kvm/book3s_hv_builtin.c:417:41: sparse: expected unsigned int [usertype] *out_xirr
arch/powerpc/kvm/book3s_hv_builtin.c:417:41: sparse: got restricted __be32 *
>> arch/powerpc/kvm/book3s_hv_builtin.c:419:22: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be32 [addressable] [usertype] xirr @@ got unsigned int @@
arch/powerpc/kvm/book3s_hv_builtin.c:419:22: sparse: expected restricted __be32 [addressable] [usertype] xirr
arch/powerpc/kvm/book3s_hv_builtin.c:419:22: sparse: got unsigned int
>> arch/powerpc/kvm/book3s_hv_builtin.c:450:41: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __be32 [addressable] [usertype] xirr @@
arch/powerpc/kvm/book3s_hv_builtin.c:450:41: sparse: expected unsigned int [usertype] val
arch/powerpc/kvm/book3s_hv_builtin.c:450:41: sparse: got restricted __be32 [addressable] [usertype] xirr
arch/powerpc/kvm/book3s_hv_builtin.c: note: in included file:
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __be64
arch/powerpc/include/asm/kvm_ppc.h:967:1: sparse: sparse: cast to restricted __le64
arch/powerpc/include/asm/kvm_ppc.h:963:1: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned long long [usertype] srr0 @@ got restricted __be64 [usertype] @@
arch/powerpc/include/asm/kvm_ppc.h:963:1: sparse: expected unsigned long long [usertype] srr0
arch/powerpc/include/asm/kvm_ppc.h:963:1: sparse: got restricted __be64 [usertype]
arch/powerpc/include/asm/kvm_ppc.h:963:1: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned long long [usertype] srr0 @@ got restricted __le64 [usertype] @@
arch/powerpc/include/asm/kvm_ppc.h:963:1: sparse: expected unsigned long long [usertype] srr0
arch/powerpc/include/asm/kvm_ppc.h:963:1: sparse: got restricted __le64 [usertype]
arch/powerpc/include/asm/kvm_ppc.h:964:1: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned long long [usertype] srr1 @@ got restricted __be64 [usertype] @@
arch/powerpc/include/asm/kvm_ppc.h:964:1: sparse: expected unsigned long long [usertype] srr1
arch/powerpc/include/asm/kvm_ppc.h:964:1: sparse: got restricted __be64 [usertype]
arch/powerpc/include/asm/kvm_ppc.h:964:1: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned long long [usertype] srr1 @@ got restricted __le64 [usertype] @@
arch/powerpc/include/asm/kvm_ppc.h:964:1: sparse: expected unsigned long long [usertype] srr1
arch/powerpc/include/asm/kvm_ppc.h:964:1: sparse: got restricted __le64 [usertype]
vim +419 arch/powerpc/kvm/book3s_hv_builtin.c
f725758b899f11 Paul Mackerras 2016-11-18 395
f725758b899f11 Paul Mackerras 2016-11-18 396 static long kvmppc_read_one_intr(bool *again)
37f55d30df2eef Suresh Warrier 2016-08-19 397 {
d381d7caf812f7 Benjamin Herrenschmidt 2017-04-05 398 void __iomem *xics_phys;
37f55d30df2eef Suresh Warrier 2016-08-19 399 u32 h_xirr;
37f55d30df2eef Suresh Warrier 2016-08-19 400 __be32 xirr;
37f55d30df2eef Suresh Warrier 2016-08-19 401 u32 xisr;
37f55d30df2eef Suresh Warrier 2016-08-19 402 u8 host_ipi;
f725758b899f11 Paul Mackerras 2016-11-18 403 int64_t rc;
37f55d30df2eef Suresh Warrier 2016-08-19 404
5af50993850a48 Benjamin Herrenschmidt 2017-04-05 405 if (xive_enabled())
5af50993850a48 Benjamin Herrenschmidt 2017-04-05 406 return 1;
5af50993850a48 Benjamin Herrenschmidt 2017-04-05 407
37f55d30df2eef Suresh Warrier 2016-08-19 408 /* see if a host IPI is pending */
37f55d30df2eef Suresh Warrier 2016-08-19 409 host_ipi = local_paca->kvm_hstate.host_ipi;
37f55d30df2eef Suresh Warrier 2016-08-19 410 if (host_ipi)
37f55d30df2eef Suresh Warrier 2016-08-19 411 return 1;
37f55d30df2eef Suresh Warrier 2016-08-19 412
37f55d30df2eef Suresh Warrier 2016-08-19 413 /* Now read the interrupt from the ICP */
37f55d30df2eef Suresh Warrier 2016-08-19 414 xics_phys = local_paca->kvm_hstate.xics_phys;
53af3ba2e8195f Paul Mackerras 2017-01-30 415 rc = 0;
ab9bad0ead9ab1 Benjamin Herrenschmidt 2017-02-07 416 if (!xics_phys)
53af3ba2e8195f Paul Mackerras 2017-01-30 417 rc = opal_int_get_xirr(&xirr, false);
53af3ba2e8195f Paul Mackerras 2017-01-30 418 else
d381d7caf812f7 Benjamin Herrenschmidt 2017-04-05 @419 xirr = __raw_rm_readl(xics_phys + XICS_XIRR);
f725758b899f11 Paul Mackerras 2016-11-18 420 if (rc < 0)
37f55d30df2eef Suresh Warrier 2016-08-19 421 return 1;
37f55d30df2eef Suresh Warrier 2016-08-19 422
37f55d30df2eef Suresh Warrier 2016-08-19 423 /*
37f55d30df2eef Suresh Warrier 2016-08-19 424 * Save XIRR for later. Since we get control in reverse endian
37f55d30df2eef Suresh Warrier 2016-08-19 425 * on LE systems, save it byte reversed and fetch it back in
37f55d30df2eef Suresh Warrier 2016-08-19 426 * host endian. Note that xirr is the value read from the
37f55d30df2eef Suresh Warrier 2016-08-19 427 * XIRR register, while h_xirr is the host endian version.
37f55d30df2eef Suresh Warrier 2016-08-19 428 */
37f55d30df2eef Suresh Warrier 2016-08-19 429 h_xirr = be32_to_cpu(xirr);
37f55d30df2eef Suresh Warrier 2016-08-19 430 local_paca->kvm_hstate.saved_xirr = h_xirr;
37f55d30df2eef Suresh Warrier 2016-08-19 431 xisr = h_xirr & 0xffffff;
37f55d30df2eef Suresh Warrier 2016-08-19 432 /*
37f55d30df2eef Suresh Warrier 2016-08-19 433 * Ensure that the store/load complete to guarantee all side
37f55d30df2eef Suresh Warrier 2016-08-19 434 * effects of loading from XIRR has completed
37f55d30df2eef Suresh Warrier 2016-08-19 435 */
37f55d30df2eef Suresh Warrier 2016-08-19 436 smp_mb();
37f55d30df2eef Suresh Warrier 2016-08-19 437
37f55d30df2eef Suresh Warrier 2016-08-19 438 /* if nothing pending in the ICP */
37f55d30df2eef Suresh Warrier 2016-08-19 439 if (!xisr)
37f55d30df2eef Suresh Warrier 2016-08-19 440 return 0;
37f55d30df2eef Suresh Warrier 2016-08-19 441
37f55d30df2eef Suresh Warrier 2016-08-19 442 /* We found something in the ICP...
37f55d30df2eef Suresh Warrier 2016-08-19 443 *
37f55d30df2eef Suresh Warrier 2016-08-19 444 * If it is an IPI, clear the MFRR and EOI it.
37f55d30df2eef Suresh Warrier 2016-08-19 445 */
37f55d30df2eef Suresh Warrier 2016-08-19 446 if (xisr == XICS_IPI) {
53af3ba2e8195f Paul Mackerras 2017-01-30 447 rc = 0;
53519e6ae0f84e Nicholas Piggin 2021-04-02 448 if (xics_phys) {
d381d7caf812f7 Benjamin Herrenschmidt 2017-04-05 449 __raw_rm_writeb(0xff, xics_phys + XICS_MFRR);
d381d7caf812f7 Benjamin Herrenschmidt 2017-04-05 @450 __raw_rm_writel(xirr, xics_phys + XICS_XIRR);
f725758b899f11 Paul Mackerras 2016-11-18 451 } else {
ab9bad0ead9ab1 Benjamin Herrenschmidt 2017-02-07 452 opal_int_set_mfrr(hard_smp_processor_id(), 0xff);
ab9bad0ead9ab1 Benjamin Herrenschmidt 2017-02-07 453 rc = opal_int_eoi(h_xirr);
53af3ba2e8195f Paul Mackerras 2017-01-30 454 }
f725758b899f11 Paul Mackerras 2016-11-18 455 /* If rc > 0, there is another interrupt pending */
f725758b899f11 Paul Mackerras 2016-11-18 456 *again = rc > 0;
f725758b899f11 Paul Mackerras 2016-11-18 457
37f55d30df2eef Suresh Warrier 2016-08-19 458 /*
37f55d30df2eef Suresh Warrier 2016-08-19 459 * Need to ensure side effects of above stores
37f55d30df2eef Suresh Warrier 2016-08-19 460 * complete before proceeding.
37f55d30df2eef Suresh Warrier 2016-08-19 461 */
37f55d30df2eef Suresh Warrier 2016-08-19 462 smp_mb();
37f55d30df2eef Suresh Warrier 2016-08-19 463
37f55d30df2eef Suresh Warrier 2016-08-19 464 /*
37f55d30df2eef Suresh Warrier 2016-08-19 465 * We need to re-check host IPI now in case it got set in the
37f55d30df2eef Suresh Warrier 2016-08-19 466 * meantime. If it's clear, we bounce the interrupt to the
37f55d30df2eef Suresh Warrier 2016-08-19 467 * guest
37f55d30df2eef Suresh Warrier 2016-08-19 468 */
37f55d30df2eef Suresh Warrier 2016-08-19 469 host_ipi = local_paca->kvm_hstate.host_ipi;
37f55d30df2eef Suresh Warrier 2016-08-19 470 if (unlikely(host_ipi != 0)) {
37f55d30df2eef Suresh Warrier 2016-08-19 471 /* We raced with the host,
37f55d30df2eef Suresh Warrier 2016-08-19 472 * we need to resend that IPI, bummer
37f55d30df2eef Suresh Warrier 2016-08-19 473 */
53519e6ae0f84e Nicholas Piggin 2021-04-02 474 if (xics_phys)
d381d7caf812f7 Benjamin Herrenschmidt 2017-04-05 475 __raw_rm_writeb(IPI_PRIORITY,
d381d7caf812f7 Benjamin Herrenschmidt 2017-04-05 476 xics_phys + XICS_MFRR);
f725758b899f11 Paul Mackerras 2016-11-18 477 else
ab9bad0ead9ab1 Benjamin Herrenschmidt 2017-02-07 478 opal_int_set_mfrr(hard_smp_processor_id(),
f725758b899f11 Paul Mackerras 2016-11-18 479 IPI_PRIORITY);
37f55d30df2eef Suresh Warrier 2016-08-19 480 /* Let side effects complete */
37f55d30df2eef Suresh Warrier 2016-08-19 481 smp_mb();
37f55d30df2eef Suresh Warrier 2016-08-19 482 return 1;
37f55d30df2eef Suresh Warrier 2016-08-19 483 }
37f55d30df2eef Suresh Warrier 2016-08-19 484
37f55d30df2eef Suresh Warrier 2016-08-19 485 /* OK, it's an IPI for us */
37f55d30df2eef Suresh Warrier 2016-08-19 486 local_paca->kvm_hstate.saved_xirr = 0;
37f55d30df2eef Suresh Warrier 2016-08-19 487 return -1;
37f55d30df2eef Suresh Warrier 2016-08-19 488 }
37f55d30df2eef Suresh Warrier 2016-08-19 489
f725758b899f11 Paul Mackerras 2016-11-18 490 return kvmppc_check_passthru(xisr, xirr, again);
37f55d30df2eef Suresh Warrier 2016-08-19 491 }
5af50993850a48 Benjamin Herrenschmidt 2017-04-05 492
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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next prev parent reply other threads:[~2021-04-02 15:28 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-01 15:02 [PATCH v5 00/48] KVM: PPC: Book3S: C-ify the P9 entry/exit code Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 01/48] KVM: PPC: Book3S HV: Nested move LPCR sanitising to sanitise_hv_regs Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 02/48] KVM: PPC: Book3S HV: Add a function to filter guest LPCR bits Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 03/48] KVM: PPC: Book3S HV: Disallow LPCR[AIL] to be set to 1 or 2 Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 04/48] KVM: PPC: Book3S HV: Prevent radix guests setting LPCR[TC] Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 05/48] KVM: PPC: Book3S HV: Remove redundant mtspr PSPB Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 06/48] KVM: PPC: Book3S HV: remove unused kvmppc_h_protect argument Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 07/48] KVM: PPC: Book3S HV: Fix CONFIG_SPAPR_TCE_IOMMU=n default hcalls Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 08/48] powerpc/64s: Remove KVM handler support from CBE_RAS interrupts Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 09/48] powerpc/64s: remove KVM SKIP test from instruction breakpoint handler Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 10/48] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 11/48] KVM: PPC: Book3S HV: Ensure MSR[HV] is always clear " Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 12/48] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 13/48] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 14/48] KVM: PPC: Book3S 64: add hcall interrupt handler Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 15/48] KVM: PPC: Book3S 64: Move hcall early register setup to KVM Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 16/48] KVM: PPC: Book3S 64: Move interrupt " Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 17/48] KVM: PPC: Book3S 64: move bad_host_intr check to HV handler Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 18/48] KVM: PPC: Book3S 64: Minimise hcall handler calling convention differences Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 19/48] KVM: PPC: Book3S HV P9: Move radix MMU switching instructions together Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 20/48] KVM: PPC: Book3S HV P9: implement kvmppc_xive_pull_vcpu in C Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 21/48] KVM: PPC: Book3S HV P9: Move xive vcpu context management into kvmhv_p9_guest_entry Nicholas Piggin
2021-04-01 15:02 ` [PATCH v5 22/48] KVM: PPC: Book3S HV P9: Stop handling hcalls in real-mode in the P9 path Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 23/48] KVM: PPC: Book3S HV P9: Move setting HDEC after switching to guest LPCR Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 24/48] KVM: PPC: Book3S HV P9: Use large decrementer for HDEC Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 25/48] KVM: PPC: Book3S HV P9: Use host timer accounting to avoid decrementer read Nicholas Piggin
2021-04-02 4:19 ` kernel test robot
2021-04-01 15:03 ` [PATCH v5 26/48] KVM: PPC: Book3S HV P9: Reduce mftb per guest entry/exit Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 27/48] KVM: PPC: Book3S HV P9: Reduce irq_work vs guest decrementer races Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 28/48] KMV: PPC: Book3S HV: Use set_dec to set decrementer to host Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 29/48] powerpc: add set_dec_or_work API for safely updating decrementer Nicholas Piggin
2021-04-02 11:04 ` Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 30/48] KVM: PPC: Book3S HV P9: Implement the rest of the P9 path in C Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 31/48] KVM: PPC: Book3S HV P9: inline kvmhv_load_hv_regs_and_go into __kvmhv_vcpu_entry_p9 Nicholas Piggin
2021-04-02 20:58 ` kernel test robot
2021-04-01 15:03 ` [PATCH v5 32/48] KVM: PPC: Book3S HV P9: Read machine check registers while MSR[RI] is 0 Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 33/48] KVM: PPC: Book3S HV P9: Improve exit timing accounting coverage Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 34/48] KVM: PPC: Book3S HV P9: Move SPR loading after expiry time check Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 35/48] KVM: PPC: Book3S HV P9: Add helpers for OS SPR handling Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 36/48] KVM: PPC: Book3S HV P9: Switch to guest MMU context as late as possible Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 37/48] KVM: PPC: Book3S HV: Implement radix prefetch workaround by disabling MMU Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 38/48] KVM: PPC: Book3S HV: Remove support for dependent threads mode on P9 Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 39/48] KVM: PPC: Book3S HV: Remove radix guest support from P7/8 path Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 40/48] KVM: PPC: Book3S HV: Remove virt mode checks from real mode handlers Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 41/48] KVM: PPC: Book3S HV: Remove unused nested HV tests in XICS emulation Nicholas Piggin
2021-04-02 15:28 ` kernel test robot [this message]
2021-04-02 16:32 ` Cédric Le Goater
2021-04-04 0:48 ` Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 42/48] KVM: PPC: Book3S HV: Radix guests should not have userspace hcalls reflected to them Nicholas Piggin
2021-04-02 0:07 ` Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 43/48] KVM: PPC: Book3S HV P9: Allow all P9 processors to enable nested HV Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 44/48] KVM: PPC: Book3S HV: small pseries_do_hcall cleanup Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 45/48] KVM: PPC: Book3S HV: add virtual mode handlers for HPT hcalls and page faults Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 46/48] KVM: PPC: Book3S HV P9: implement hash guest support Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 47/48] KVM: PPC: Book3S HV P9: implement hash host / " Nicholas Piggin
2021-04-01 15:03 ` [PATCH v5 48/48] KVM: PPC: Book3S HV: remove ISA v3.0 and v3.1 support from P7/8 path Nicholas Piggin
2021-04-02 0:11 ` Nicholas Piggin
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