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Thu, 15 Apr 2021 17:51:13 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3BA86A4055; Thu, 15 Apr 2021 17:51:11 +0000 (GMT) Received: from linux.vnet.ibm.com (unknown [9.126.150.29]) by d06av23.portsmouth.uk.ibm.com (Postfix) with SMTP; Thu, 15 Apr 2021 17:51:11 +0000 (GMT) Date: Thu, 15 Apr 2021 23:21:10 +0530 From: Srikar Dronamraju To: Gautham R Shenoy Subject: Re: [PATCH 3/3] powerpc/smp: Cache CPU to chip lookup Message-ID: <20210415175110.GE2633526@linux.vnet.ibm.com> References: <20210415120934.232271-1-srikar@linux.vnet.ibm.com> <20210415120934.232271-4-srikar@linux.vnet.ibm.com> <20210415171921.GB16351@in.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <20210415171921.GB16351@in.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: RQYrXLPbyCyR98EZ9_OkInMgp-cMBRfd X-Proofpoint-GUID: ncVAzCGVssJ1MmY0eQewGlfS0RDA9K22 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-15_09:2021-04-15, 2021-04-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 spamscore=0 mlxscore=0 mlxlogscore=827 clxscore=1015 impostorscore=0 adultscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104150108 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Srikar Dronamraju Cc: Nathan Lynch , Peter Zijlstra , Daniel Henrique Barboza , Valentin Schneider , qemu-ppc@nongnu.org, Cedric Le Goater , linuxppc-dev , Ingo Molnar , David Gibson Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" * Gautham R Shenoy [2021-04-15 22:49:21]: > > > > +int *chip_id_lookup_table; > > + > > #ifdef CONFIG_PPC64 > > int __initdata iommu_is_off; > > int __initdata iommu_force_on; > > @@ -914,13 +916,22 @@ EXPORT_SYMBOL(of_get_ibm_chip_id); > > int cpu_to_chip_id(int cpu) > > { > > struct device_node *np; > > + int ret = -1, idx; > > + > > + idx = cpu / threads_per_core; > > + if (chip_id_lookup_table && chip_id_lookup_table[idx] != -1) > > The value -1 is ambiguous since we won't be able to determine if > it is because we haven't yet made a of_get_ibm_chip_id() call > or if of_get_ibm_chip_id() call was made and it returned a -1. > We don't allocate chip_id_lookup_table unless cpu_to_chip_id() return !-1 value for the boot-cpuid. So this ensures that we dont unnecessarily allocate chip_id_lookup_table. Also I check for chip_id_lookup_table before calling cpu_to_chip_id() for other CPUs. So this avoids overhead of calling cpu_to_chip_id() for platforms that dont support it. Also its most likely that if the chip_id_lookup_table is initialized then of_get_ibm_chip_id() call would return a valid value. + Below we are only populating the lookup table, only when the of_get_cpu_node is valid. So I dont see any drawbacks of initializing it to -1. Do you see any? > Thus, perhaps we can initialize chip_id_lookup_table[idx] with a > different unique negative value. How about S32_MIN ? and check > chip_id_lookup_table[idx] is different here ? > I had initially initialized to -2, But then I thought we adding in more confusion than necessary and it was not solving any issues. -- Thanks and Regards Srikar Dronamraju