From: "Cédric Le Goater" <clg@kaod.org>
To: linuxppc-dev@lists.ozlabs.org
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PATCH 09/31] powerpc/pseries/pci: Add a msi_free() handler to clear XIVE data
Date: Fri, 30 Apr 2021 10:03:45 +0200 [thread overview]
Message-ID: <20210430080407.4030767-10-clg@kaod.org> (raw)
In-Reply-To: <20210430080407.4030767-1-clg@kaod.org>
The MSI domain clears the IRQ with msi_domain_free(), which calls
irq_domain_free_irqs_top(), which clears the handler data. This is a
problem for the XIVE controller since we need to unmap MMIO pages and
free a specific XIVE structure.
The 'msi_free()' handler is called before irq_domain_free_irqs_top()
when the handler data is still available. Use that to clear the XIVE
controller data.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
arch/powerpc/include/asm/xive.h | 1 +
arch/powerpc/platforms/pseries/msi.c | 16 +++++++++++++++-
arch/powerpc/sysdev/xive/common.c | 5 ++++-
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/xive.h b/arch/powerpc/include/asm/xive.h
index aa094a8655b0..20ae50ab083c 100644
--- a/arch/powerpc/include/asm/xive.h
+++ b/arch/powerpc/include/asm/xive.h
@@ -111,6 +111,7 @@ void xive_native_free_vp_block(u32 vp_base);
int xive_native_populate_irq_data(u32 hw_irq,
struct xive_irq_data *data);
void xive_cleanup_irq_data(struct xive_irq_data *xd);
+void xive_irq_free_data(unsigned int virq);
void xive_native_free_irq(u32 irq);
int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index a41c448520d4..da9d63a088bb 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -529,6 +529,19 @@ static int pseries_msi_ops_prepare(struct irq_domain *domain, struct device *dev
return rtas_prepare_msi_irqs(pdev, nvec, type, arg);
}
+/*
+ * ->msi_free() is called before irq_domain_free_irqs_top() when the
+ * handler data is still available. Use that to clear the XIVE
+ * controller data.
+ */
+static void pseries_msi_ops_msi_free(struct irq_domain *domain,
+ struct msi_domain_info *info,
+ unsigned int irq)
+{
+ if (xive_enabled())
+ xive_irq_free_data(irq);
+}
+
/*
* RTAS can not disable one MSI at a time. It's all or nothing. Do it
* at the end after all IRQs have been freed.
@@ -546,6 +559,7 @@ static void pseries_msi_domain_free_irqs(struct irq_domain *domain,
static struct msi_domain_ops pseries_pci_msi_domain_ops = {
.msi_prepare = pseries_msi_ops_prepare,
+ .msi_free = pseries_msi_ops_msi_free,
.domain_free_irqs = pseries_msi_domain_free_irqs,
};
@@ -660,7 +674,7 @@ static void pseries_irq_domain_free(struct irq_domain *domain, unsigned int virq
pr_debug("%s bridge %pOF %d #%d\n", __func__, phb->dn, virq, nr_irqs);
- irq_domain_free_irqs_parent(domain, virq, nr_irqs);
+ /* XIVE domain data is cleared through ->msi_free() */
}
static const struct irq_domain_ops pseries_irq_domain_ops = {
diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c
index 3485baf9ec8c..191cd80ec534 100644
--- a/arch/powerpc/sysdev/xive/common.c
+++ b/arch/powerpc/sysdev/xive/common.c
@@ -980,6 +980,8 @@ EXPORT_SYMBOL_GPL(is_xive_irq);
void xive_cleanup_irq_data(struct xive_irq_data *xd)
{
+ pr_debug("%s for HW %x\n", __func__, xd->hw_irq);
+
if (xd->eoi_mmio) {
unmap_kernel_range((unsigned long)xd->eoi_mmio,
1u << xd->esb_shift);
@@ -1025,7 +1027,7 @@ static int xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw)
return 0;
}
-static void xive_irq_free_data(unsigned int virq)
+void xive_irq_free_data(unsigned int virq)
{
struct xive_irq_data *xd = irq_get_handler_data(virq);
@@ -1035,6 +1037,7 @@ static void xive_irq_free_data(unsigned int virq)
xive_cleanup_irq_data(xd);
kfree(xd);
}
+EXPORT_SYMBOL_GPL(xive_irq_free_data);
#ifdef CONFIG_SMP
--
2.26.3
next prev parent reply other threads:[~2021-04-30 8:11 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-30 8:03 [PATCH 00/31] powerpc: Modernize the PCI/MSI support Cédric Le Goater
2021-04-30 8:03 ` [PATCH 01/31] powerpc/pseries/pci: Introduce __find_pe_total_msi() Cédric Le Goater
2021-04-30 8:03 ` [PATCH 02/31] powerpc/pseries/pci: Introduce rtas_prepare_msi_irqs() Cédric Le Goater
2021-04-30 8:03 ` [PATCH 03/31] powerpc/xive: Add support for IRQ domain hierarchy Cédric Le Goater
2021-04-30 8:03 ` [PATCH 04/31] powerpc/xive: Ease debugging of xive_irq_set_affinity() Cédric Le Goater
2021-04-30 8:03 ` [PATCH 05/31] powerpc/pseries/pci: Add MSI domains Cédric Le Goater
2021-04-30 8:03 ` [PATCH 06/31] powerpc/xive: Drop unmask of MSIs at startup Cédric Le Goater
2021-04-30 8:03 ` [PATCH 07/31] powerpc/xive: Fix xive_irq_set_affinity for MSI Cédric Le Goater
2021-05-14 20:48 ` Thomas Gleixner
2021-05-20 17:25 ` Cédric Le Goater
2021-04-30 8:03 ` [PATCH 08/31] powerpc/pseries/pci: Add a domain_free_irqs handler Cédric Le Goater
2021-04-30 8:03 ` Cédric Le Goater [this message]
2021-05-20 12:33 ` [PATCH 09/31] powerpc/pseries/pci: Add a msi_free() handler to clear XIVE data Cédric Le Goater
2021-04-30 8:03 ` [PATCH 10/31] powerpc/pseries/pci: Add support of MSI domains to PHB hotplug Cédric Le Goater
2021-04-30 8:03 ` [PATCH 11/31] powerpc/powernv/pci: Introduce __pnv_pci_ioda_msi_setup() Cédric Le Goater
2021-04-30 8:03 ` [PATCH 12/31] powerpc/powernv/pci: Add MSI domains Cédric Le Goater
2021-04-30 8:03 ` [PATCH 13/31] KVM: PPC: Book3S HV: Use the new IRQ chip to detect passthrough interrupts Cédric Le Goater
2021-04-30 8:03 ` [PATCH 14/31] KVM: PPC: Book3S HV: XIVE: Change interface of passthrough interrupt routines Cédric Le Goater
2021-04-30 8:03 ` [PATCH 15/31] KVM: PPC: Book3S HV: XIVE: Fix mapping of passthrough interrupts Cédric Le Goater
2021-05-14 20:51 ` Thomas Gleixner
2021-05-15 10:40 ` Marc Zyngier
2021-05-20 12:09 ` Cédric Le Goater
2021-04-30 8:03 ` [PATCH 16/31] powerpc/xics: Remove ICS list Cédric Le Goater
2021-04-30 8:03 ` [PATCH 17/31] powerpc/xics: Rename the map handler in a check handler Cédric Le Goater
2021-04-30 8:03 ` [PATCH 18/31] powerpc/xics: Give a name to the default XICS IRQ domain Cédric Le Goater
2021-04-30 8:03 ` [PATCH 19/31] powerpc/xics: Add debug logging to the set_irq_affinity handlers Cédric Le Goater
2021-04-30 8:03 ` [PATCH 20/31] powerpc/xics: Add support for IRQ domain hierarchy Cédric Le Goater
2021-04-30 8:03 ` [PATCH 21/31] powerpc/powernv/pci: Customize the MSI EOI handler to support PHB3 Cédric Le Goater
2021-04-30 8:03 ` [PATCH 22/31] powerpc/pci: Drop XIVE restriction on MSI domains Cédric Le Goater
2021-04-30 8:03 ` [PATCH 23/31] powerpc/xics: Drop unmask of MSIs at startup Cédric Le Goater
2021-04-30 8:04 ` [PATCH 24/31] powerpc/pseries/pci: Drop unused MSI code Cédric Le Goater
2021-04-30 8:04 ` [PATCH 25/31] powerpc/powernv/pci: " Cédric Le Goater
2021-04-30 8:04 ` [PATCH 26/31] powerpc/powernv/pci: Adapt is_pnv_opal_msi() to detect passthrough interrupt Cédric Le Goater
2021-04-30 8:04 ` [PATCH 27/31] powerpc/xics: Fix IRQ migration Cédric Le Goater
2021-04-30 8:04 ` [PATCH 28/31] powerpc/powernv/pci: Set the IRQ chip data for P8/CXL devices Cédric Le Goater
2021-04-30 8:04 ` [PATCH 29/31] powerpc/powernv/pci: Rework pnv_opal_pci_msi_eoi() Cédric Le Goater
2021-04-30 8:04 ` [PATCH 30/31] KVM: PPC: Book3S HV: XICS: Fix mapping of passthrough interrupts Cédric Le Goater
2021-04-30 8:04 ` [PATCH 31/31] genirq: Improve "hwirq" output in /proc and /sys/ Cédric Le Goater
2021-05-14 20:49 ` Thomas Gleixner
2021-05-20 12:27 ` Cédric Le Goater
2021-05-20 12:57 ` Thomas Gleixner
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