From: Nicholas Piggin <npiggin@gmail.com>
To: kvm-ppc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v3 52/52] KVM: PPC: Book3S HV P9: Remove subcore HMI handling
Date: Tue, 5 Oct 2021 02:00:49 +1000 [thread overview]
Message-ID: <20211004160049.1338837-53-npiggin@gmail.com> (raw)
In-Reply-To: <20211004160049.1338837-1-npiggin@gmail.com>
On POWER9 and newer, rather than the complex HMI synchronisation and
subcore state, have each thread un-apply the guest TB offset before
calling into the early HMI handler.
This allows the subcore state to be avoided, including subcore enter
/ exit guest, which includes an expensive divide that shows up
slightly in profiles.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/kvm_ppc.h | 1 +
arch/powerpc/kvm/book3s_hv.c | 12 +++---
arch/powerpc/kvm/book3s_hv_hmi.c | 7 +++-
arch/powerpc/kvm/book3s_hv_p9_entry.c | 2 +-
arch/powerpc/kvm/book3s_hv_ras.c | 54 +++++++++++++++++++++++++++
5 files changed, 67 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 671fbd1a765e..70ffcb3c91bf 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -760,6 +760,7 @@ void kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu);
void kvmppc_subcore_enter_guest(void);
void kvmppc_subcore_exit_guest(void);
long kvmppc_realmode_hmi_handler(void);
+long kvmppc_p9_realmode_hmi_handler(struct kvm_vcpu *vcpu);
long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
long pte_index, unsigned long pteh, unsigned long ptel);
long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags,
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 351018f617fb..449ac0a19ceb 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -4014,8 +4014,6 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
vcpu->arch.ceded = 0;
- kvmppc_subcore_enter_guest();
-
vcpu_vpa_increment_dispatch(vcpu);
if (kvmhv_on_pseries()) {
@@ -4068,8 +4066,6 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
vcpu_vpa_increment_dispatch(vcpu);
- kvmppc_subcore_exit_guest();
-
return trap;
}
@@ -6069,9 +6065,11 @@ static int kvmppc_book3s_init_hv(void)
if (r)
return r;
- r = kvm_init_subcore_bitmap();
- if (r)
- return r;
+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
+ r = kvm_init_subcore_bitmap();
+ if (r)
+ return r;
+ }
/*
* We need a way of accessing the XICS interrupt controller,
diff --git a/arch/powerpc/kvm/book3s_hv_hmi.c b/arch/powerpc/kvm/book3s_hv_hmi.c
index 9af660476314..1ec50c69678b 100644
--- a/arch/powerpc/kvm/book3s_hv_hmi.c
+++ b/arch/powerpc/kvm/book3s_hv_hmi.c
@@ -20,10 +20,15 @@ void wait_for_subcore_guest_exit(void)
/*
* NULL bitmap pointer indicates that KVM module hasn't
- * been loaded yet and hence no guests are running.
+ * been loaded yet and hence no guests are running, or running
+ * on POWER9 or newer CPU.
+ *
* If no KVM is in use, no need to co-ordinate among threads
* as all of them will always be in host and no one is going
* to modify TB other than the opal hmi handler.
+ *
+ * POWER9 and newer don't need this synchronisation.
+ *
* Hence, just return from here.
*/
if (!local_paca->sibling_subcore_state)
diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/book3s_hv_p9_entry.c
index fbecbdc42c26..86a222f97e8e 100644
--- a/arch/powerpc/kvm/book3s_hv_p9_entry.c
+++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c
@@ -938,7 +938,7 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc
kvmppc_realmode_machine_check(vcpu);
} else if (unlikely(trap == BOOK3S_INTERRUPT_HMI)) {
- kvmppc_realmode_hmi_handler();
+ kvmppc_p9_realmode_hmi_handler(vcpu);
} else if (trap == BOOK3S_INTERRUPT_H_EMUL_ASSIST) {
vcpu->arch.emul_inst = mfspr(SPRN_HEIR);
diff --git a/arch/powerpc/kvm/book3s_hv_ras.c b/arch/powerpc/kvm/book3s_hv_ras.c
index d4bca93b79f6..ccfd96965630 100644
--- a/arch/powerpc/kvm/book3s_hv_ras.c
+++ b/arch/powerpc/kvm/book3s_hv_ras.c
@@ -136,6 +136,60 @@ void kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
vcpu->arch.mce_evt = mce_evt;
}
+
+long kvmppc_p9_realmode_hmi_handler(struct kvm_vcpu *vcpu)
+{
+ struct kvmppc_vcore *vc = vcpu->arch.vcore;
+ long ret = 0;
+
+ /*
+ * Unapply and clear the offset first. That way, if the TB was not
+ * resynced then it will remain in host-offset, and if it was resynced
+ * then it is brought into host-offset. Then the tb offset is
+ * re-applied before continuing with the KVM exit.
+ *
+ * This way, we don't need to actually know whether not OPAL resynced
+ * the timebase or do any of the complicated dance that the P7/8
+ * path requires.
+ */
+ if (vc->tb_offset_applied) {
+ u64 new_tb = mftb() - vc->tb_offset_applied;
+ mtspr(SPRN_TBU40, new_tb);
+ if ((mftb() & 0xffffff) < (new_tb & 0xffffff)) {
+ new_tb += 0x1000000;
+ mtspr(SPRN_TBU40, new_tb);
+ }
+ vc->tb_offset_applied = 0;
+ }
+
+ local_paca->hmi_irqs++;
+
+ if (hmi_handle_debugtrig(NULL) >= 0) {
+ ret = 1;
+ goto out;
+ }
+
+ if (ppc_md.hmi_exception_early)
+ ppc_md.hmi_exception_early(NULL);
+
+out:
+ if (vc->tb_offset) {
+ u64 new_tb = mftb() + vc->tb_offset;
+ mtspr(SPRN_TBU40, new_tb);
+ if ((mftb() & 0xffffff) < (new_tb & 0xffffff)) {
+ new_tb += 0x1000000;
+ mtspr(SPRN_TBU40, new_tb);
+ }
+ vc->tb_offset_applied = vc->tb_offset;
+ }
+
+ return ret;
+}
+
+/*
+ * The following subcore HMI handling is all only for pre-POWER9 CPUs.
+ */
+
/* Check if dynamic split is in force and return subcore size accordingly. */
static inline int kvmppc_cur_subcore_size(void)
{
--
2.23.0
prev parent reply other threads:[~2021-10-04 16:36 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-04 15:59 [PATCH v3 00/52] KVM: PPC: Book3S HV P9: entry/exit optimisations Nicholas Piggin
2021-10-04 15:59 ` [PATCH v3 01/52] powerpc/64s: Remove WORT SPR from POWER9/10 (take 2) Nicholas Piggin
2021-10-04 15:59 ` [PATCH v3 02/52] powerpc/64s: guard optional TIDR SPR with CPU ftr test Nicholas Piggin
2021-10-11 18:44 ` Fabiano Rosas
2021-10-12 2:08 ` Michael Ellerman
2021-10-13 16:51 ` Fabiano Rosas
2021-10-04 16:00 ` [PATCH v3 03/52] KMV: PPC: Book3S HV P9: Use set_dec to set decrementer to host Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 04/52] KVM: PPC: Book3S HV P9: Use host timer accounting to avoid decrementer read Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 05/52] KVM: PPC: Book3S HV P9: Use large decrementer for HDEC Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 06/52] KVM: PPC: Book3S HV P9: Reduce mftb per guest entry/exit Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 07/52] powerpc/time: add API for KVM to re-arm the host timer/decrementer Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 08/52] KVM: PPC: Book3S HV: POWER10 enable HAIL when running radix guests Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 09/52] powerpc/64s: Keep AMOR SPR a constant ~0 at runtime Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 10/52] KVM: PPC: Book3S HV: Don't always save PMU for guest capable of nesting Nicholas Piggin
2021-10-16 12:38 ` Fabiano Rosas
2021-10-20 5:26 ` Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 11/52] powerpc/64s: Always set PMU control registers to frozen/disabled when not in use Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 12/52] powerpc/64s: Implement PMU override command line option Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 13/52] KVM: PPC: Book3S HV P9: Implement PMU save/restore in C Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 14/52] KVM: PPC: Book3S HV P9: Factor PMU save/load into context switch functions Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 15/52] KVM: PPC: Book3S HV P9: Demand fault PMU SPRs when marked not inuse Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 16/52] KVM: PPC: Book3S HV P9: Factor out yield_count increment Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 17/52] KVM: PPC: Book3S HV: CTRL SPR does not require read-modify-write Nicholas Piggin
2021-10-16 12:54 ` Fabiano Rosas
2021-10-04 16:00 ` [PATCH v3 18/52] KVM: PPC: Book3S HV P9: Move SPRG restore to restore_p9_host_os_sprs Nicholas Piggin
2021-10-16 12:59 ` Fabiano Rosas
2021-10-04 16:00 ` [PATCH v3 19/52] KVM: PPC: Book3S HV P9: Reduce mtmsrd instructions required to save host SPRs Nicholas Piggin
2021-10-16 13:45 ` Fabiano Rosas
2021-10-20 5:35 ` Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 20/52] KVM: PPC: Book3S HV P9: Improve mtmsrd scheduling by delaying MSR[EE] disable Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 21/52] KVM: PPC: Book3S HV P9: Add kvmppc_stop_thread to match kvmppc_start_thread Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 22/52] KVM: PPC: Book3S HV: Change dec_expires to be relative to guest timebase Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 23/52] KVM: PPC: Book3S HV P9: Move TB updates Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 24/52] KVM: PPC: Book3S HV P9: Optimise timebase reads Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 25/52] KVM: PPC: Book3S HV P9: Avoid SPR scoreboard stalls Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 26/52] KVM: PPC: Book3S HV P9: Only execute mtSPR if the value changed Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 27/52] KVM: PPC: Book3S HV P9: Juggle SPR switching around Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 28/52] KVM: PPC: Book3S HV P9: Move vcpu register save/restore into functions Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 29/52] KVM: PPC: Book3S HV P9: Move host OS save/restore functions to built-in Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 30/52] KVM: PPC: Book3S HV P9: Move nested guest entry into its own function Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 31/52] KVM: PPC: Book3S HV P9: Move remaining SPR and MSR access into low level entry Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 32/52] KVM: PPC: Book3S HV P9: Implement TM fastpath for guest entry/exit Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 33/52] KVM: PPC: Book3S HV P9: Switch PMU to guest as late as possible Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 34/52] KVM: PPC: Book3S HV P9: Restrict DSISR canary workaround to processors that require it Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 35/52] KVM: PPC: Book3S HV P9: More SPR speed improvements Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 36/52] KVM: PPC: Book3S HV P9: Demand fault EBB facility registers Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 37/52] KVM: PPC: Book3S HV P9: Demand fault TM " Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 38/52] KVM: PPC: Book3S HV P9: Use Linux SPR save/restore to manage some host SPRs Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 39/52] KVM: PPC: Book3S HV P9: Comment and fix MMU context switching code Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 40/52] KVM: PPC: Book3S HV P9: Test dawr_enabled() before saving host DAWR SPRs Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 41/52] KVM: PPC: Book3S HV P9: Don't restore PSSCR if not needed Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 42/52] KVM: PPC: Book3S HV P9: Avoid tlbsync sequence on radix guest exit Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 43/52] KVM: PPC: Book3S HV Nested: Avoid extra mftb() in nested entry Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 44/52] KVM: PPC: Book3S HV P9: Improve mfmsr performance on entry Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 45/52] KVM: PPC: Book3S HV P9: Optimise hash guest SLB saving Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 46/52] KVM: PPC: Book3S HV P9: Avoid changing MSR[RI] in entry and exit Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 47/52] KVM: PPC: Book3S HV P9: Add unlikely annotation for !mmu_ready Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 48/52] KVM: PPC: Book3S HV P9: Avoid cpu_in_guest atomics on entry and exit Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 49/52] KVM: PPC: Book3S HV P9: Remove most of the vcore logic Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 50/52] KVM: PPC: Book3S HV P9: Tidy kvmppc_create_dtl_entry Nicholas Piggin
2021-10-04 16:00 ` [PATCH v3 51/52] KVM: PPC: Book3S HV P9: Stop using vc->dpdes Nicholas Piggin
2021-10-04 16:00 ` Nicholas Piggin [this message]
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