From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 892A3C433EF for ; Fri, 6 May 2022 00:15:18 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4KvWKx1hdxz3fwr for ; Fri, 6 May 2022 10:15:17 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=fl+nh4xZ; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.intel.com (client-ip=192.55.52.115; helo=mga14.intel.com; envelope-from=ricardo.neri-calderon@linux.intel.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=fl+nh4xZ; dkim-atps=neutral Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4KvVzX09R6z3cDH for ; Fri, 6 May 2022 09:59:19 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651795160; x=1683331160; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=NgL6S1cr5J9GxlUSQa9DYNpqQacM6MNmaOCrW38i9fU=; b=fl+nh4xZVQAG8JOh5raNxTQObPa3E+IuUxFMvVhppyIz9TRWsJwaBMCz gdVH493VUUb0j4hvNlAEM4rrYv75vjkAcRFKV1UzGEChak7nrxuX7DFWT Kn/GDXNAgIfMxaT19n7iLzo1SahLYRXYj/OF+Y0cSthHH1j/S4tkm/gqV wlX6XrqSCHITFR+JFANpe3UL+qFRGCJnewwvoM2yuNnIlZvC/7nK1zwOf KjTdKuaxNMhqFGIj9jUVw91EOM9OsYO7din2j8lpuV1q51LJ78F8CVnEw OIa/43DTLgsByxoY8kPCzZU6whcOkhfoNX805m1BEGigSFYgBBJrYlZAM w==; X-IronPort-AV: E=McAfee;i="6400,9594,10338"; a="268437340" X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="268437340" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2022 16:57:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="694914448" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orsmga004.jf.intel.com with ESMTP; 05 May 2022 16:57:55 -0700 From: Ricardo Neri To: Thomas Gleixner , x86@kernel.org Subject: [PATCH v6 26/29] x86/watchdog: Add a shim hardlockup detector Date: Thu, 5 May 2022 17:00:05 -0700 Message-Id: <20220506000008.30892-27-ricardo.neri-calderon@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506000008.30892-1-ricardo.neri-calderon@linux.intel.com> References: <20220506000008.30892-1-ricardo.neri-calderon@linux.intel.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Ravi V. Shankar" , Andi Kleen , linuxppc-dev@lists.ozlabs.org, Joerg Roedel , Ricardo Neri , Stephane Eranian , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Tony Luck , Nicholas Piggin , Suravee Suthikulpanit , Ricardo Neri , Andrew Morton , David Woodhouse , Lu Baolu Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" The generic hardlockup detector is based on perf. It also provides a set of weak functions that CPU architectures can override. Add a shim hardlockup detector for x86 that overrides such functions and can select between perf and HPET implementations of the detector. For clarity, add the intermediate Kconfig symbol X86_HARDLOCKUP_DETECTOR that is selected whenever the core of the hardlockup detector is selected. Cc: Andi Kleen Cc: Stephane Eranian Cc: "Ravi V. Shankar" Cc: iommu@lists.linux-foundation.org Cc: linuxppc-dev@lists.ozlabs.org Cc: x86@kernel.org Suggested-by: Nicholas Piggin Reviewed-by: Tony Luck Signed-off-by: Ricardo Neri --- Changes since v5: * Added watchdog_nmi_start() to be used when tsc_khz is recalibrated. * Always build the x86-specific hardlockup detector shim; not only when the HPET-based detector is selected. * Corrected a typo in comment in watchdog_nmi_probe() (Ani) * Removed useless local ret variable in watchdog_nmi_enable(). (Ani) Changes since v4: * Use a switch to enable and disable the various available detectors. (Andi) Changes since v3: * Fixed style in multi-line comment. (Randy Dunlap) Changes since v2: * Pass cpu number as argument to hardlockup_detector_[enable|disable]. (Thomas Gleixner) Changes since v1: * Introduced this patch: Added an x86-specific shim hardlockup detector. (Nicholas Piggin) --- arch/x86/Kconfig.debug | 3 ++ arch/x86/kernel/Makefile | 2 + arch/x86/kernel/watchdog_hld.c | 85 ++++++++++++++++++++++++++++++++++ 3 files changed, 90 insertions(+) create mode 100644 arch/x86/kernel/watchdog_hld.c diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index bc34239589db..599001157847 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug @@ -6,6 +6,9 @@ config TRACE_IRQFLAGS_NMI_SUPPORT config EARLY_PRINTK_USB bool +config X86_HARDLOCKUP_DETECTOR + def_bool y if HARDLOCKUP_DETECTOR_CORE + config X86_VERBOSE_BOOTUP bool "Enable verbose x86 bootup info messages" default y diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index c700b00a2d86..af3d54e4c836 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -114,6 +114,8 @@ obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_VM86) += vm86_32.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +obj-$(CONFIG_X86_HARDLOCKUP_DETECTOR) += watchdog_hld.o + obj-$(CONFIG_HPET_TIMER) += hpet.o obj-$(CONFIG_X86_HARDLOCKUP_DETECTOR_HPET) += watchdog_hld_hpet.o diff --git a/arch/x86/kernel/watchdog_hld.c b/arch/x86/kernel/watchdog_hld.c new file mode 100644 index 000000000000..ef11f0af4ef5 --- /dev/null +++ b/arch/x86/kernel/watchdog_hld.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * A shim hardlockup detector. It overrides the weak stubs of the generic + * implementation to select between the perf- or the hpet-based implementation. + * + * Copyright (C) Intel Corporation 2022 + */ + +#include +#include + +enum x86_hardlockup_detector { + X86_HARDLOCKUP_DETECTOR_PERF, + X86_HARDLOCKUP_DETECTOR_HPET, +}; + +static enum __read_mostly x86_hardlockup_detector detector_type; + +int watchdog_nmi_enable(unsigned int cpu) +{ + switch (detector_type) { + case X86_HARDLOCKUP_DETECTOR_PERF: + hardlockup_detector_perf_enable(); + break; + case X86_HARDLOCKUP_DETECTOR_HPET: + hardlockup_detector_hpet_enable(cpu); + break; + default: + return -ENODEV; + } + + return 0; +} + +void watchdog_nmi_disable(unsigned int cpu) +{ + switch (detector_type) { + case X86_HARDLOCKUP_DETECTOR_PERF: + hardlockup_detector_perf_disable(); + break; + case X86_HARDLOCKUP_DETECTOR_HPET: + hardlockup_detector_hpet_disable(cpu); + break; + } +} + +int __init watchdog_nmi_probe(void) +{ + int ret; + + /* + * Try first with the HPET hardlockup detector. It will only + * succeed if selected at build time and requested in the + * nmi_watchdog command-line parameter. This ensures that the + * perf-based detector is used by default, if selected at + * build time. + */ + ret = hardlockup_detector_hpet_init(); + if (!ret) { + detector_type = X86_HARDLOCKUP_DETECTOR_HPET; + return ret; + } + + ret = hardlockup_detector_perf_init(); + if (!ret) { + detector_type = X86_HARDLOCKUP_DETECTOR_PERF; + return ret; + } + + return 0; +} + +void watchdog_nmi_stop(void) +{ + /* Only the HPET lockup detector defines a stop function. */ + if (detector_type == X86_HARDLOCKUP_DETECTOR_HPET) + hardlockup_detector_hpet_stop(); +} + +void watchdog_nmi_start(void) +{ + /* Only the HPET lockup detector defines a start function. */ + if (detector_type == X86_HARDLOCKUP_DETECTOR_HPET) + hardlockup_detector_hpet_start(); +} -- 2.17.1