From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5EF0CC433EF for ; Fri, 6 May 2022 00:01:50 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4KvW2N3rXBz3dpx for ; Fri, 6 May 2022 10:01:48 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=MjpTO4G/; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.intel.com (client-ip=192.55.52.115; helo=mga14.intel.com; envelope-from=ricardo.neri-calderon@linux.intel.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=MjpTO4G/; dkim-atps=neutral Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4KvVz75wV9z3bqr for ; Fri, 6 May 2022 09:58:59 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651795139; x=1683331139; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Jz5/GbztoMpO5f33w54Dy1VgumudmsMpWQzH5+E5s4I=; b=MjpTO4G/pJuvxQL/talMrOiPKl30sFGhUybv9RsVUyQz23hrSV6fcBEs ormkRADrXSps656DlGisEYfQOYjSKn0nh4/AVcrpbvydAXRf7SDh7U2lZ HJZNXCYecHDIJy+0DYFydQQlsk0QgvCnEwrMGKgDwDfMm9n2TzvYH6azs mfjJswUzL2aro2aVhl2jeaNfZrn4wFoQJ7eqmXuhpz7/oWGDyeHZyfs4Z ZqSuUTIg8WSLrZA6/IkNgoZ4NIJUvqD+oB5/JK+rXO6KnbkMhHqK11nu+ NLHec55mIQFBAdHfU4nIwE+ZRiCqiUBNQ+V0Q5kXGfjxDnSHOGplkFzqs g==; X-IronPort-AV: E=McAfee;i="6400,9594,10338"; a="268437293" X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="268437293" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2022 16:57:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="694914335" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orsmga004.jf.intel.com with ESMTP; 05 May 2022 16:57:45 -0700 From: Ricardo Neri To: Thomas Gleixner , x86@kernel.org Subject: [PATCH v6 04/29] x86/apic: Add the X86_IRQ_ALLOC_AS_NMI irq allocation flag Date: Thu, 5 May 2022 16:59:43 -0700 Message-Id: <20220506000008.30892-5-ricardo.neri-calderon@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506000008.30892-1-ricardo.neri-calderon@linux.intel.com> References: <20220506000008.30892-1-ricardo.neri-calderon@linux.intel.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Ravi V. Shankar" , Andi Kleen , linuxppc-dev@lists.ozlabs.org, Joerg Roedel , Ricardo Neri , Stephane Eranian , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Tony Luck , Nicholas Piggin , Suravee Suthikulpanit , Ricardo Neri , Andrew Morton , David Woodhouse , Lu Baolu Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" There are cases in which it is necessary to set the delivery mode of an interrupt as NMI. Add a new flag that callers can specify when allocating an IRQ. Cc: Andi Kleen Cc: "Ravi V. Shankar" Cc: Stephane Eranian Cc: iommu@lists.linux-foundation.org Cc: linuxppc-dev@lists.ozlabs.org Cc: x86@kernel.org Suggested-by: Thomas Gleixner Reviewed-by: Tony Luck Signed-off-by: Ricardo Neri --- Changes since v5: * Introduced this patch. Changes since v4: * N/A Changes since v3: * N/A Changes since v2: * N/A Changes since v1: * N/A --- arch/x86/include/asm/irqdomain.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/irqdomain.h b/arch/x86/include/asm/irqdomain.h index 125c23b7bad3..de1cf2e80443 100644 --- a/arch/x86/include/asm/irqdomain.h +++ b/arch/x86/include/asm/irqdomain.h @@ -10,6 +10,7 @@ enum { /* Allocate contiguous CPU vectors */ X86_IRQ_ALLOC_CONTIGUOUS_VECTORS = 0x1, X86_IRQ_ALLOC_LEGACY = 0x2, + X86_IRQ_ALLOC_AS_NMI = 0x4, }; extern int x86_fwspec_is_ioapic(struct irq_fwspec *fwspec); -- 2.17.1