linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Kajol Jain <kjain@linux.ibm.com>
To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org
Cc: kjain@linux.ibm.com, atrajeev@linux.vnet.ibm.com,
	maddy@linux.ibm.com, disgoel@linux.vnet.ibm.com,
	rnsastry@linux.ibm.com
Subject: [PATCH 28/35] selftest/powerpc/pmu: Add selftest for PERF_TYPE_HARDWARE events valid check
Date: Fri,  6 May 2022 14:15:37 +0530	[thread overview]
Message-ID: <20220506084544.56527-29-kjain@linux.ibm.com> (raw)
In-Reply-To: <20220506084544.56527-1-kjain@linux.ibm.com>

From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>

Testcase to ensure that using invalid event in generic
event for PERF_TYPE_HARDWARE will fail. Invalid generic
events in power10 are:
- PERF_COUNT_HW_BUS_CYCLES
- PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
- PERF_COUNT_HW_STALLED_CYCLES_BACKEND
- PERF_COUNT_HW_REF_CPU_CYCLES

Invalid generic events in power9 are:
- PERF_COUNT_HW_BUS_CYCLES
- PERF_COUNT_HW_REF_CPU_CYCLES

Testcase does event open for valid and invalid generic
events to ensure event open works for all valid events
and fails for invalid events.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
 .../powerpc/pmu/event_code_tests/Makefile     |   2 +-
 .../generic_events_valid_test.c               | 130 ++++++++++++++++++
 2 files changed, 131 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c

diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 50bcc036dddf..0d56f1ef530f 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -4,7 +4,7 @@ CFLAGS += -m64
 TEST_GEN_PROGS := group_constraint_pmc56_test group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
 	group_constraint_repeat_test group_constraint_radix_scope_qual_test reserved_bits_mmcra_sample_elig_mode_test \
 	group_constraint_mmcra_sample_test invalid_event_code_test reserved_bits_mmcra_thresh_ctl_test \
-	blacklisted_events_test event_alternatives_tests_p9 event_alternatives_tests_p10
+	blacklisted_events_test event_alternatives_tests_p9 event_alternatives_tests_p10 generic_events_valid_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c
new file mode 100644
index 000000000000..0d237c15d3f2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include <sys/prctl.h>
+#include <limits.h>
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Testcase to ensure that using invalid event in generic
+ * event for PERF_TYPE_HARDWARE should fail
+ */
+
+static int generic_events_valid_test(void)
+{
+	struct event event;
+
+	/* Check for platform support for the test */
+	SKIP_IF(platform_check_for_tests());
+
+	/* generic events is different in compat_mode */
+	SKIP_IF(check_for_generic_compat_pmu());
+
+	/*
+	 * Invalid generic events in power10:
+	 * - PERF_COUNT_HW_BUS_CYCLES
+	 * - PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
+	 * - PERF_COUNT_HW_STALLED_CYCLES_BACKEND
+	 * - PERF_COUNT_HW_REF_CPU_CYCLES
+	 */
+	if (PVR_VER(mfspr(SPRN_PVR)) == POWER10) {
+		event_init_opts(&event, PERF_COUNT_HW_CPU_CYCLES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_INSTRUCTIONS,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_CACHE_REFERENCES,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_CACHE_MISSES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_BRANCH_INSTRUCTIONS,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_BRANCH_MISSES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_BUS_CYCLES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(!event_open(&event));
+
+		event_init_opts(&event, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(!event_open(&event));
+
+		event_init_opts(&event, PERF_COUNT_HW_STALLED_CYCLES_BACKEND,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(!event_open(&event));
+
+		event_init_opts(&event, PERF_COUNT_HW_REF_CPU_CYCLES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(!event_open(&event));
+	} else if (PVR_VER(mfspr(SPRN_PVR)) == POWER9) {
+		/*
+		 * Invalid generic events in power9:
+		 * - PERF_COUNT_HW_BUS_CYCLES
+		 * - PERF_COUNT_HW_REF_CPU_CYCLES
+		 */
+		event_init_opts(&event, PERF_COUNT_HW_CPU_CYCLES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_INSTRUCTIONS, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_CACHE_REFERENCES,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_CACHE_MISSES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_BRANCH_INSTRUCTIONS,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_BRANCH_MISSES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_BUS_CYCLES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(!event_open(&event));
+
+		event_init_opts(&event, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_STALLED_CYCLES_BACKEND,
+				PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(event_open(&event));
+		event_close(&event);
+
+		event_init_opts(&event, PERF_COUNT_HW_REF_CPU_CYCLES, PERF_TYPE_HARDWARE, "event");
+		FAIL_IF(!event_open(&event));
+	}
+
+	return 0;
+}
+
+int main(void)
+{
+	return test_harness(generic_events_valid_test, "generic_events_valid_test");
+}
-- 
2.31.1


  parent reply	other threads:[~2022-05-06  9:02 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-06  8:45 [PATCH 00/35] Add group constraints and event code test as part of selftest Kajol Jain
2022-05-06  8:45 ` [PATCH 01/35] selftest/powerpc/pmu: Add mask/shift bits for extracting threshold compare field Kajol Jain
2022-05-06  8:45 ` [PATCH 02/35] testing/selftests/powerpc: Add support to fetch "platform" and "base platform" from auxv to detect platform Kajol Jain
2022-05-06  8:45 ` [PATCH 03/35] selftest/powerpc/pmu: Add interface test for mmcra_thresh_cmp fields Kajol Jain
2022-05-06  8:45 ` [PATCH 04/35] selftest/powerpc/pmu: Add support for branch sampling in get_intr_regs function Kajol Jain
2022-05-06  8:45 ` [PATCH 05/35] selftest/powerpc/pmu: Add interface test for mmcra_ifm field of indirect call type Kajol Jain
2022-05-06  8:45 ` [PATCH 06/35] selftest/powerpc/pmu: Add interface test for mmcra_ifm field for any branch type Kajol Jain
2022-05-06  8:45 ` [PATCH 07/35] selftest/powerpc/pmu: Add interface test for mmcra_ifm field for conditional " Kajol Jain
2022-05-06  8:45 ` [PATCH 08/35] selftest/powerpc/pmu: Add interface test for bhrb disable field Kajol Jain
2022-05-06  8:45 ` [PATCH 09/35] selftest/powerpc/pmu: Refactor the platform check and add macros to find array size/PVR Kajol Jain
2022-05-06  8:45 ` [PATCH 10/35] selftest/powerpc/pmu: Add selftest to check branch stack enablement will not crash on any platforms Kajol Jain
2022-05-06  8:45 ` [PATCH 11/35] selftest/powerpc/pmu: Add selftest to check PERF_SAMPLE_REGS_INTR option " Kajol Jain
2022-05-06  8:45 ` [PATCH 12/35] selftest/powerpc/pmu: Add selftest for checking valid and invalid bhrb filter maps Kajol Jain
2022-05-06  8:45 ` [PATCH 13/35] selftest/powerpc/pmu: Add selftest for mmcr1 pmcxsel/unit/cache fields Kajol Jain
2022-05-06  8:45 ` [PATCH 14/35] selftest/powerpc/pmu: Add interface test for bhrb disable field for non-branch samples Kajol Jain
2022-05-06  8:45 ` [PATCH 15/35] selftest/powerpc/pmu: Add support for perf event code tests Kajol Jain
2022-05-06  8:45 ` [PATCH 16/35] selftest/powerpc/pmu: Add selftest for group constraint check for PMC5 and PMC6 Kajol Jain
2022-05-06  8:45 ` [PATCH 17/35] selftest/powerpc/pmu: Add selftest to check PMC5/6 is excluded from some constraint checks Kajol Jain
2022-05-06  8:45 ` [PATCH 18/35] selftest/powerpc/pmu: Add selftest to check constraint for number of counters in use Kajol Jain
2022-05-06  8:45 ` [PATCH 19/35] selftest/powerpc/pmu: Add selftest for group constraint check when using same PMC Kajol Jain
2022-05-06  8:45 ` [PATCH 20/35] selftest/powerpc/pmu: Add selftest for group constraint check for radix_scope_qual field Kajol Jain
2022-05-06  8:45 ` [PATCH 21/35] selftest/powerpc/pmu: Add selftest for group constraint for MMCRA Sampling Mode field Kajol Jain
2022-05-06  8:45 ` [PATCH 22/35] selftest/powerpc/pmu: Add selftest for group constraint check MMCRA sample bits Kajol Jain
2022-05-06  8:45 ` [PATCH 23/35] selftest/powerpc/pmu: Add selftest for checking invalid bits in event code Kajol Jain
2022-05-06  8:45 ` [PATCH 24/35] selftest/powerpc/pmu: Add selftest for reserved bit check for MMCRA thresh_ctl field Kajol Jain
2022-05-06  8:45 ` [PATCH 25/35] selftest/powerpc/pmu: Add selftest for blacklist events check in power9 Kajol Jain
2022-05-06  8:45 ` [PATCH 26/35] selftest/powerpc/pmu: Add selftest for event alternatives for power9 Kajol Jain
2022-05-06  8:45 ` [PATCH 27/35] selftest/powerpc/pmu: Add selftest for event alternatives for power10 Kajol Jain
2022-05-06  8:45 ` Kajol Jain [this message]
2022-05-06  8:45 ` [PATCH 29/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCR0 l2l3_sel bits Kajol Jain
2022-05-06  8:45 ` [PATCH 30/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCR1 cache bits Kajol Jain
2022-05-06  8:45 ` [PATCH 31/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_cmp field Kajol Jain
2022-05-06  8:45 ` [PATCH 32/35] selftest/powerpc/pmu: Add selftest for group constraint for unit and pmc field in p9 Kajol Jain
2022-05-06  8:45 ` [PATCH 33/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_ctl field Kajol Jain
2022-05-06  8:45 ` [PATCH 34/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_sel field Kajol Jain
2022-05-06  8:45 ` [PATCH 35/35] selftest/powerpc/pmu: Add test for hardware cache events Kajol Jain
2022-05-18 13:23 ` [PATCH 00/35] Add group constraints and event code test as part of selftest Michael Ellerman
2022-05-19 16:26   ` Athira Rajeev

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220506084544.56527-29-kjain@linux.ibm.com \
    --to=kjain@linux.ibm.com \
    --cc=atrajeev@linux.vnet.ibm.com \
    --cc=disgoel@linux.vnet.ibm.com \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=maddy@linux.ibm.com \
    --cc=mpe@ellerman.id.au \
    --cc=rnsastry@linux.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).