From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AED1C43334 for ; Thu, 2 Jun 2022 08:50:34 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LDKV03Bw5z3cBm for ; Thu, 2 Jun 2022 18:50:32 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=segher@kernel.crashing.org; receiver=) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by lists.ozlabs.org (Postfix) with ESMTP id 4LDKTT4MLHz3bkP for ; Thu, 2 Jun 2022 18:50:03 +1000 (AEST) Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 2528kuTS021724; Thu, 2 Jun 2022 03:46:56 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 2528ktuW021722; Thu, 2 Jun 2022 03:46:55 -0500 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Thu, 2 Jun 2022 03:46:55 -0500 From: Segher Boessenkool To: Jordan Niethe Subject: Re: [PATCH] powerpc/64: Drop ppc_inst_as_str() Message-ID: <20220602084654.GZ25951@gate.crashing.org> References: <20220531065936.3674348-1-mpe@ellerman.id.au> <20220531222715.GT25951@gate.crashing.org> <87fskopsui.fsf@mpe.ellerman.id.au> <20220601162023.GW25951@gate.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Jun 02, 2022 at 01:01:04PM +1000, Jordan Niethe wrote: > > What about the more fundamental thing? Have the order of the two halves > > of a prefixed insn as ulong not depend on endianness? It really is two > > opcodes, and the prefixed one is first, always, even in LE. > The reason would be the value of as ulong is then used to write a > prefixed instruction to > memory with std. > If both endiannesses had the halves the same one of them would store > the suffix in front of the prefix. You cannot do such a (possibly) unaligned access from C though, not without invoking undefined behaviour. The compiler usually lets you get away with it, but there are no guarantees. You can make sure you only ever do such an access from assembler code of course. Swapping the two halves of a register costs at most one insn. It is harmful premature optimisation to make this single cycle advantage override more important consideration (almost everything else :-) ) Segher