From: Rashmica Gupta <rashmica@linux.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: npiggin@gmail.com
Subject: [PATCH] powerpc/signal: Update comment for clarity
Date: Fri, 17 Jun 2022 14:31:35 +1000 [thread overview]
Message-ID: <20220617043135.426897-1-rashmica@linux.ibm.com> (raw)
The comment being referred to was deleted in commit af1bbc3dd3d5 ("powerpc:
Remove UP only lazy floating point and vector optimisations").
Add a bit more detail so it's clear why we need to clear the FP/VEC/VSX
bits here.
Signed-off-by: Rashmica Gupta <rashmica@linux.ibm.com>
---
arch/powerpc/kernel/signal_64.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 472596a109e2..86bb5bb4c143 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -377,9 +377,12 @@ static long notrace __unsafe_restore_sigcontext(struct task_struct *tsk, sigset_
unsafe_get_user(set->sig[0], &sc->oldmask, efault_out);
/*
- * Force reload of FP/VEC.
- * This has to be done before copying stuff into tsk->thread.fpr/vr
- * for the reasons explained in the previous comment.
+ * Force reload of FP/VEC/VSX so userspace sees any changes.
+ * Clear these bits from the user process' MSR before copying into the
+ * thread struct. If we are rescheduled or preempted and another task
+ * uses FP/VEC/VSX, and this process has the MSR bits set, then the
+ * context switch code will save the current CPU state into the
+ * thread_struct - possibly overwriting the data we are updating here.
*/
regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX));
--
2.35.3
next reply other threads:[~2022-06-17 4:32 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-17 4:31 Rashmica Gupta [this message]
2022-07-29 13:03 ` [PATCH] powerpc/signal: Update comment for clarity Michael Ellerman
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