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Linux hangs around when the serdes is initialized if the si5341 is enabled, so it's commented out. The MC firmware needs to be fairly new (it must support DPAA2_MAC_FEATURE_PROTOCOL_CHANGE), and the DPC needs to set the macs to MAC_LINK_TYPE_BACKPLANE. For this reason, I think this will be difficult to do in a backwards-compatible manner. I have not really tested this, but hopefully it can be a good starting point. Signed-off-by: Sean Anderson --- Changes in v4: - Convert to new bindings .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 161 ++++++++++++++++++ 1 file changed, 161 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts index 1bfbce69cc8b..7279d914843c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts @@ -10,17 +10,138 @@ /dts-v1/; +#include + #include "fsl-ls1088a.dtsi" / { model = "LS1088A RDB Board"; compatible = "fsl,ls1088a-rdb", "fsl,ls1088a"; + + clocks { + si5341_xtal: clock-48mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + clk_100mhz: clock-100mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + clk_156mhz: clock-156mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <156250000>; + }; + }; + + ovdd: regulator-1v8 { + compatible = "regulator-fixed"; + regulator-name = "ovdd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + dvdd: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "dvdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + +}; + +&serdes1 { + //clocks = <&si5341 0 8>, <&si5341 0 9>; + clocks = <&clk_100mhz>, <&clk_156mhz>; + clock-names = "ref0", "ref1"; + status = "okay"; + + serdes1_0: phy@0 { + #phy-cells = <0>; + reg = <0>; + + /* SG2 */ + sgmii-3 { + fsl,pccr = <0x8>; + fsl,index = <3>; + fsl,cfg = <0x1>; + fsl,type = ; + }; + + /* XFI2 */ + xfi-1 { + fsl,pccr = <0xb>; + fsl,index = <1>; + fsl,cfg = <0x1>; + fsl,type = ; + }; + }; + + serdes1_1: phy@1 { + #phy-cells = <0>; + reg = <1>; + + /* SG1 */ + sgmii-2 { + fsl,pccr = <0x8>; + fsl,index = <2>; + fsl,cfg = <0x1>; + fsl,type = ; + }; + + /* + * XFI2 + * Table 23-1 and section 23.5.16.4 disagree; this reflects the + * table. + */ + xfi-0 { + fsl,pccr = <0xb>; + fsl,index = <0>; + fsl,cfg = <0x1>; + fsl,type = ; + }; + }; + + serdes1_2: phy@2 { + #phy-cells = <0>; + reg = <2>; + + /* QSGb */ + qsgmii-1 { + fsl,pccr = <0x9>; + fsl,index = <1>; + fsl,cfg = <0x1>; + fsl,type = ; + }; + }; + + serdes1_3: phy@2 { + #phy-cells = <0>; + reg = <2>; + + /* QSGa */ + qsgmii-0 { + fsl,pccr = <0x9>; + fsl,index = <0>; + fsl,cfg = <0x1>; + fsl,type = ; + }; + }; +}; + +&dpmac1 { + phys = <&serdes1_1>; }; &dpmac2 { phy-handle = <&mdio2_aquantia_phy>; phy-connection-type = "10gbase-r"; pcs-handle = <&pcs2>; + phys = <&serdes1_0>; }; &dpmac3 { @@ -28,6 +149,7 @@ &dpmac3 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs3_0>; + phys = <&serdes1_3>; }; &dpmac4 { @@ -35,6 +157,7 @@ &dpmac4 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs3_1>; + phys = <&serdes1_3>; }; &dpmac5 { @@ -42,6 +165,7 @@ &dpmac5 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs3_2>; + phys = <&serdes1_3>; }; &dpmac6 { @@ -49,6 +173,7 @@ &dpmac6 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs3_3>; + phys = <&serdes1_3>; }; &dpmac7 { @@ -56,6 +181,7 @@ &dpmac7 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs7_0>; + phys = <&serdes1_2>; }; &dpmac8 { @@ -63,6 +189,7 @@ &dpmac8 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs7_1>; + phys = <&serdes1_2>; }; &dpmac9 { @@ -70,6 +197,7 @@ &dpmac9 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs7_2>; + phys = <&serdes1_2>; }; &dpmac10 { @@ -77,6 +205,7 @@ &dpmac10 { phy-connection-type = "qsgmii"; managed = "in-band-status"; pcs-handle = <&pcs7_3>; + phys = <&serdes1_2>; }; &emdio1 { @@ -142,6 +271,38 @@ i2c-switch@77 { #address-cells = <1>; #size-cells = <0>; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + + si5341: clock-generator@74 { + #address-cells = <1>; + #clock-cells = <2>; + #size-cells = <0>; + compatible = "silabs,si5341"; + reg = <0x74>; + clocks = <&si5341_xtal>; + clock-names = "xtal"; + vdd-supply = <&ovdd>; + vdda-supply = <&dvdd>; + vddo8-supply = <&ovdd>; + vddo9-supply = <&ovdd>; + silabs,iovdd-33; + status = "disabled"; + + out@8 { + reg = <8>; + silabs,format = <1>; + }; + + out@9 { + reg = <9>; + silabs,format = <1>; + }; + }; + }; + i2c@2 { #address-cells = <1>; #size-cells = <0>; -- 2.35.1.1320.gc452695387.dirty