From: Rohan McLure <rmclure@linux.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Rohan McLure <rmclure@linux.ibm.com>,
Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH 06/23] powerpc/64e: Clarify register saves and clears with {SAVE,ZEROIZE}_GPRS
Date: Fri, 16 Sep 2022 15:32:43 +1000 [thread overview]
Message-ID: <20220916053300.786330-7-rmclure@linux.ibm.com> (raw)
In-Reply-To: <20220916053300.786330-1-rmclure@linux.ibm.com>
The common interrupt handler prologue macro and the bad_stack
trampolines include consecutive sequences of register saves, and some
register clears. Neaten such instances by expanding use of the SAVE_GPRS
macro and employing the ZEROIZE_GPR macro when appropriate.
Also simplify an invocation of SAVE_GPRS targetting all non-volatile
registers to SAVE_NVGPRS.
Signed-off-by: Rohan Mclure <rmclure@linux.ibm.com>
Reported-by: Nicholas Piggin <npiggin@gmail.com>
---
V3 -> V4: New commit.
---
arch/powerpc/kernel/exceptions-64e.S | 27 +++++++++++---------------
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 67dc4e3179a0..48c640ca425d 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -216,17 +216,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
mtlr r10
mtcr r11
- ld r10,GPR10(r1)
- ld r11,GPR11(r1)
- ld r12,GPR12(r1)
+ REST_GPRS(10, 12, r1)
mtspr \scratch,r0
std r10,\paca_ex+EX_R10(r13);
std r11,\paca_ex+EX_R11(r13);
ld r10,_NIP(r1)
ld r11,_MSR(r1)
- ld r0,GPR0(r1)
- ld r1,GPR1(r1)
+ REST_GPRS(0, 1, r1)
mtspr \srr0,r10
mtspr \srr1,r11
ld r10,\paca_ex+EX_R10(r13)
@@ -372,16 +369,15 @@ ret_from_mc_except:
/* Core exception code for all exceptions except TLB misses. */
#define EXCEPTION_COMMON_LVL(n, scratch, excf) \
exc_##n##_common: \
- std r0,GPR0(r1); /* save r0 in stackframe */ \
- std r2,GPR2(r1); /* save r2 in stackframe */ \
- SAVE_GPRS(3, 9, r1); /* save r3 - r9 in stackframe */ \
+ SAVE_GPR(0, r1); /* save r0 in stackframe */ \
+ SAVE_GPRS(2, 9, r1); /* save r2 - r9 in stackframe */ \
std r10,_NIP(r1); /* save SRR0 to stackframe */ \
std r11,_MSR(r1); /* save SRR1 to stackframe */ \
beq 2f; /* if from kernel mode */ \
2: ld r3,excf+EX_R10(r13); /* get back r10 */ \
ld r4,excf+EX_R11(r13); /* get back r11 */ \
mfspr r5,scratch; /* get back r13 */ \
- std r12,GPR12(r1); /* save r12 in stackframe */ \
+ SAVE_GPR(12, r1); /* save r12 in stackframe */ \
ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
mflr r6; /* save LR in stackframe */ \
mfctr r7; /* save CTR in stackframe */ \
@@ -390,7 +386,7 @@ exc_##n##_common: \
lwz r10,excf+EX_CR(r13); /* load orig CR back from PACA */ \
lbz r11,PACAIRQSOFTMASK(r13); /* get current IRQ softe */ \
ld r12,exception_marker@toc(r2); \
- li r0,0; \
+ ZEROIZE_GPR(0); \
std r3,GPR10(r1); /* save r10 to stackframe */ \
std r4,GPR11(r1); /* save r11 to stackframe */ \
std r5,GPR13(r1); /* save it to stackframe */ \
@@ -1056,15 +1052,14 @@ bad_stack_book3e:
mfspr r11,SPRN_ESR
std r10,_DEAR(r1)
std r11,_ESR(r1)
- std r0,GPR0(r1); /* save r0 in stackframe */ \
- std r2,GPR2(r1); /* save r2 in stackframe */ \
- SAVE_GPRS(3, 9, r1); /* save r3 - r9 in stackframe */ \
+ SAVE_GPR(0, r1); /* save r0 in stackframe */ \
+ SAVE_GPRS(2, 9, r1); /* save r2 - r9 in stackframe */ \
ld r3,PACA_EXGEN+EX_R10(r13);/* get back r10 */ \
ld r4,PACA_EXGEN+EX_R11(r13);/* get back r11 */ \
mfspr r5,SPRN_SPRG_GEN_SCRATCH;/* get back r13 XXX can be wrong */ \
std r3,GPR10(r1); /* save r10 to stackframe */ \
std r4,GPR11(r1); /* save r11 to stackframe */ \
- std r12,GPR12(r1); /* save r12 in stackframe */ \
+ SAVE_GPR(12, r1); /* save r12 in stackframe */ \
std r5,GPR13(r1); /* save it to stackframe */ \
mflr r10
mfctr r11
@@ -1072,12 +1067,12 @@ bad_stack_book3e:
std r10,_LINK(r1)
std r11,_CTR(r1)
std r12,_XER(r1)
- SAVE_GPRS(14, 31, r1)
+ SAVE_NVGPRS(r1)
lhz r12,PACA_TRAP_SAVE(r13)
std r12,_TRAP(r1)
addi r11,r1,INT_FRAME_SIZE
std r11,0(r1)
- li r12,0
+ ZEROIZE_GPR(12)
std r12,0(r11)
ld r2,PACATOC(r13)
1: addi r3,r1,STACK_FRAME_OVERHEAD
--
2.34.1
next prev parent reply other threads:[~2022-09-16 5:37 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-16 5:32 [PATCH 00/23] powerpc: Syscall wrapper and register clearing Rohan McLure
2022-09-16 5:32 ` [PATCH 01/23] powerpc: Remove asmlinkage from syscall handler definitions Rohan McLure
2022-09-16 5:32 ` [PATCH 02/23] powerpc: Save caller r3 prior to system_call_exception Rohan McLure
2022-09-16 5:32 ` [PATCH 03/23] powerpc: Add ZEROIZE_GPRS macros for register clears Rohan McLure
2022-09-16 5:32 ` [PATCH 04/23] powerpc/64s: Use {ZEROIZE,SAVE,REST}_GPRS macros in sc, scv 0 handlers Rohan McLure
2022-09-16 5:32 ` [PATCH 05/23] powerpc/32: Clarify interrupt restores with REST_GPR macro in entry_32.S Rohan McLure
2022-09-20 0:51 ` Nicholas Piggin
2022-09-16 5:32 ` Rohan McLure [this message]
2022-09-20 0:55 ` [PATCH 06/23] powerpc/64e: Clarify register saves and clears with {SAVE,ZEROIZE}_GPRS Nicholas Piggin
2022-09-16 5:32 ` [PATCH 07/23] powerpc/64s: Fix comment on interrupt handler prologue Rohan McLure
2022-09-20 0:55 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 08/23] powerpc: Fix fallocate and fadvise64_64 compat parameter combination Rohan McLure
2022-09-16 6:54 ` Arnd Bergmann
2022-09-20 1:01 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 09/23] asm-generic: compat: Support BE for long long args in 32-bit ABIs Rohan McLure
2022-09-20 1:06 ` Nicholas Piggin
2022-09-20 7:09 ` Arnd Bergmann
2022-09-16 5:32 ` [PATCH 10/23] powerpc: Use generic fallocate compatibility syscall Rohan McLure
2022-09-16 6:56 ` Arnd Bergmann
2022-09-16 5:32 ` [PATCH 11/23] powerpc/32: Remove powerpc select specialisation Rohan McLure
2022-09-16 5:32 ` [PATCH 12/23] powerpc: Remove direct call to personality syscall handler Rohan McLure
2022-09-16 5:32 ` [PATCH 13/23] powerpc: Remove direct call to mmap2 syscall handlers Rohan McLure
2022-09-16 5:32 ` [PATCH 14/23] powerpc: Provide do_ppc64_personality helper Rohan McLure
2022-09-16 5:32 ` [PATCH 15/23] powerpc: Adopt SYSCALL_DEFINE for arch-specific syscall handlers Rohan McLure
2022-09-16 5:48 ` Rohan McLure
2022-09-20 1:24 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 16/23] powerpc: Include all arch-specific syscall prototypes Rohan McLure
2022-09-20 1:27 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 17/23] powerpc: Enable compile-time check for syscall handlers Rohan McLure
2022-09-20 1:30 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 18/23] powerpc: Use common syscall handler type Rohan McLure
2022-09-20 1:39 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 19/23] powerpc: Provide syscall wrapper Rohan McLure
2022-09-20 1:59 ` Nicholas Piggin
2022-09-21 3:44 ` Rohan McLure
2022-09-16 5:32 ` [PATCH 20/23] powerpc/64s: Clear/restore caller gprs in syscall interrupt/return Rohan McLure
2022-09-20 2:03 ` Nicholas Piggin
2022-09-20 4:54 ` Rohan McLure
2022-09-21 5:33 ` Rohan McLure
2022-09-20 2:07 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 21/23] powerpc/64: Add INTERRUPT_SANITIZE_REGISTERS Kconfig Rohan McLure
2022-09-20 2:10 ` Nicholas Piggin
2022-09-16 5:32 ` [PATCH 22/23] powerpc/64s: Clear gprs on interrupt routine entry in Book3S Rohan McLure
2022-09-20 2:27 ` Nicholas Piggin
2022-09-16 5:33 ` [PATCH 23/23] powerpc/64e: Clear gprs on interrupt routine entry on Book3E Rohan McLure
2022-09-16 5:58 ` [PATCH 00/23] powerpc: Syscall wrapper and register clearing Rohan McLure
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