From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C829C4332F for ; Fri, 14 Oct 2022 14:29:36 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4MppgL4Hbnz3fN2 for ; Sat, 15 Oct 2022 01:29:34 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=VXQUQr20; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=2604:1380:4641:c500::1; helo=dfw.source.kernel.org; envelope-from=sashal@kernel.org; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=VXQUQr20; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4MpnvF5MTzz3dxf for ; Sat, 15 Oct 2022 00:54:49 +1100 (AEDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9CBD161B60; Fri, 14 Oct 2022 13:54:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66DF2C433C1; Fri, 14 Oct 2022 13:54:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665755686; bh=q2L3bh/SATxgdBEHHGvSWTUdP+QqN2SHMKRLJmEs5Ys=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VXQUQr20OhfoY3+s/pkNiRYtLh6z7Tycm7t7KCjM1QA1xbKQSdmir+i3t0bdl8dBb NDrpDafQG7StM6ErZtXd65xen22TQc5Xsma0YBIiHSAE5Q01aKD4mxZhlLnE6r8vqw cIRKVKLuf2qXOoYFqXt9E3Rw7cTrAt3vjxOnC1ElAydp76GVsaNarMFX0sBvziCiRM USHF5DNb3Zss4YBFYDTU6FGCbqXLd5FOrAYEwiCoVZ+xeySntyc5TGdux/od/jzxBz j9J2mDUp31TWAmEFccTWVOurrRh+O12AoJzz4uIuxEANuB9LRGMwZKYbOOYnZQbL0J ZVN6XLob6sdHw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH AUTOSEL 4.19 5/5] powerpc/64: Fix msr_check_and_set/clear MSR[EE] race Date: Fri, 14 Oct 2022 09:54:28 -0400 Message-Id: <20221014135430.2110067-5-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221014135430.2110067-1-sashal@kernel.org> References: <20221014135430.2110067-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sasha Levin , atrajeev@linux.vnet.ibm.com, keescook@chromium.org, Julia.Lawall@inria.fr, Nicholas Piggin , Sachin Sant , naveen.n.rao@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, ebiederm@xmission.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Nicholas Piggin [ Upstream commit 0fa6831811f62cfc10415d731bcf9fde2647ad81 ] irq soft-masking means that when Linux irqs are disabled, the MSR[EE] value can change from 1 to 0 asynchronously: if a masked interrupt of the PACA_IRQ_MUST_HARD_MASK variety fires while irqs are disabled, the masked handler will return with MSR[EE]=0. This means a sequence like mtmsr(mfmsr() | MSR_FP) is racy if it can be called with local irqs disabled, unless a hard_irq_disable has been done. Reported-by: Sachin Sant Signed-off-by: Nicholas Piggin Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20221004051157.308999-2-npiggin@gmail.com Signed-off-by: Sasha Levin --- arch/powerpc/include/asm/hw_irq.h | 24 ++++++++++++++++++++++++ arch/powerpc/kernel/process.c | 4 ++-- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index 32a18f2f49bc..3ef454f99d24 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -353,6 +353,30 @@ static inline void may_hard_irq_enable(void) { } #endif /* CONFIG_PPC64 */ +static inline unsigned long mtmsr_isync_irqsafe(unsigned long msr) +{ +#ifdef CONFIG_PPC64 + if (arch_irqs_disabled()) { + /* + * With soft-masking, MSR[EE] can change from 1 to 0 + * asynchronously when irqs are disabled, and we don't want to + * set MSR[EE] back to 1 here if that has happened. A race-free + * way to do this is ensure EE is already 0. Another way it + * could be done is with a RESTART_TABLE handler, but that's + * probably overkill here. + */ + msr &= ~MSR_EE; + mtmsr_isync(msr); + irq_soft_mask_set(IRQS_ALL_DISABLED); + local_paca->irq_happened |= PACA_IRQ_HARD_DIS; + } else +#endif + mtmsr_isync(msr); + + return msr; +} + + #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST /* diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 9f89fac4ed08..a703b98ced11 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -131,7 +131,7 @@ unsigned long msr_check_and_set(unsigned long bits) #endif if (oldmsr != newmsr) - mtmsr_isync(newmsr); + newmsr = mtmsr_isync_irqsafe(newmsr); return newmsr; } @@ -150,7 +150,7 @@ void __msr_check_and_clear(unsigned long bits) #endif if (oldmsr != newmsr) - mtmsr_isync(newmsr); + mtmsr_isync_irqsafe(newmsr); } EXPORT_SYMBOL(__msr_check_and_clear); -- 2.35.1