From: Vidya Sagar <vidyas@nvidia.com>
To: <bhelgaas@google.com>, <ruscur@russell.cc>, <oohall@gmail.com>,
<treding@nvidia.com>, <jonathanh@nvidia.com>
Cc: mmaddireddy@nvidia.com, kthota@nvidia.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
vidyas@nvidia.com, vsethi@nvidia.com,
linuxppc-dev@lists.ozlabs.org, sagar.tv@gmail.com
Subject: [PATCH V1] PCI/AER: Configure ECRC only AER is native
Date: Thu, 12 Jan 2023 02:01:16 +0530 [thread overview]
Message-ID: <20230111203116.4896-1-vidyas@nvidia.com> (raw)
As the ECRC configuration bits are part of AER registers, configure
ECRC only if AER is natively owned by the kernel.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
drivers/pci/pcie/aer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index e2d8a74f83c3..730b47bdcdef 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -184,6 +184,9 @@ static int disable_ecrc_checking(struct pci_dev *dev)
*/
void pcie_set_ecrc_checking(struct pci_dev *dev)
{
+ if (!pcie_aer_is_native(dev))
+ return;
+
switch (ecrc_policy) {
case ECRC_POLICY_DEFAULT:
return;
--
2.17.1
next reply other threads:[~2023-01-11 21:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 20:31 Vidya Sagar [this message]
2023-01-11 21:42 ` [PATCH V1] PCI/AER: Configure ECRC only AER is native Sathyanarayanan Kuppuswamy
2023-01-11 23:10 ` Bjorn Helgaas
2023-01-11 23:27 ` Sathyanarayanan Kuppuswamy
2023-01-12 3:33 ` Vidya Sagar
2023-01-12 3:48 ` Sathyanarayanan Kuppuswamy
2023-01-12 4:59 ` Vidya Sagar
2023-01-12 5:06 ` Sathyanarayanan Kuppuswamy
2023-01-12 7:12 ` Vidya Sagar
2023-01-12 18:23 ` Bjorn Helgaas
2023-01-12 7:21 ` [PATCH V2] " Vidya Sagar
2023-01-12 18:25 ` Bjorn Helgaas
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