From: Nicholas Piggin <npiggin@gmail.com>
To: kvm@vger.kernel.org
Cc: Laurent Vivier <lvivier@redhat.com>,
Thomas Huth <thuth@redhat.com>,
linuxppc-dev@lists.ozlabs.org,
Nicholas Piggin <npiggin@gmail.com>
Subject: [kvm-unit-tests PATCH 5/7] powerpc: Indirect SPR accessor functions
Date: Fri, 17 Mar 2023 22:36:12 +1000 [thread overview]
Message-ID: <20230317123614.3687163-5-npiggin@gmail.com> (raw)
In-Reply-To: <20230317123614.3687163-1-npiggin@gmail.com>
Make overly-clever SPR accessor functions that allow a non-constant
SPR number to be specified. This will be used to restructure test
in the next change.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
powerpc/sprs.c | 63 ++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 54 insertions(+), 9 deletions(-)
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index 45f77a5..b633ea8 100644
--- a/powerpc/sprs.c
+++ b/powerpc/sprs.c
@@ -28,21 +28,66 @@
#include <asm/processor.h>
#include <asm/barrier.h>
-#define mfspr(nr) ({ \
- uint64_t ret; \
- asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr)); \
- ret; \
-})
+/* "Indirect" mfspr/mtspr which accept a non-constant spr number */
+static uint64_t mfspr(unsigned spr)
+{
+ uint64_t tmp;
+ uint64_t ret;
+
+ asm volatile(
+" bcl 20, 31, 1f \n"
+"1: mflr %0 \n"
+" addi %0, %0, (2f-1b) \n"
+" add %0, %0, %2 \n"
+" mtctr %0 \n"
+" bctr \n"
+"2: \n"
+".LSPR=0 \n"
+".rept 1024 \n"
+" mfspr %1, .LSPR \n"
+" b 3f \n"
+" .LSPR=.LSPR+1 \n"
+".endr \n"
+"3: \n"
+ : "=&r"(tmp),
+ "=r"(ret)
+ : "r"(spr*8) /* 8 bytes per 'mfspr ; b' block */
+ : "lr", "ctr");
+
+ return ret;
+}
-#define mtspr(nr, val) \
- asm volatile("mtspr %0,%1" : : "i"(nr), "r"(val))
+static void mtspr(unsigned spr, uint64_t val)
+{
+ uint64_t tmp;
+
+ asm volatile(
+" bcl 20, 31, 1f \n"
+"1: mflr %0 \n"
+" addi %0, %0, (2f-1b) \n"
+" add %0, %0, %2 \n"
+" mtctr %0 \n"
+" bctr \n"
+"2: \n"
+".LSPR=0 \n"
+".rept 1024 \n"
+" mtspr .LSPR, %1 \n"
+" b 3f \n"
+" .LSPR=.LSPR+1 \n"
+".endr \n"
+"3: \n"
+ : "=&r"(tmp)
+ : "r"(val),
+ "r"(spr*8) /* 8 bytes per 'mfspr ; b' block */
+ : "lr", "ctr", "xer");
+}
uint64_t before[1024], after[1024];
/* Common SPRs for all PowerPC CPUs */
static void set_sprs_common(uint64_t val)
{
- mtspr(9, val); /* CTR */
+ // mtspr(9, val); /* CTR */ /* Used by mfspr/mtspr */
// mtspr(273, val); /* SPRG1 */ /* Used by our exception handler */
mtspr(274, val); /* SPRG2 */
mtspr(275, val); /* SPRG3 */
@@ -156,7 +201,7 @@ static void set_sprs(uint64_t val)
static void get_sprs_common(uint64_t *v)
{
- v[9] = mfspr(9); /* CTR */
+ v[9] = mfspr(9); /* CTR */ /* Used by mfspr/mtspr */
// v[273] = mfspr(273); /* SPRG1 */ /* Used by our exception handler */
v[274] = mfspr(274); /* SPRG2 */
v[275] = mfspr(275); /* SPRG3 */
--
2.37.2
next prev parent reply other threads:[~2023-03-17 12:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-17 12:36 [kvm-unit-tests PATCH 1/7] MAINTAINERS: Update powerpc list Nicholas Piggin
2023-03-17 12:36 ` [kvm-unit-tests PATCH 2/7] powerpc: add local variant of SPR test Nicholas Piggin
2023-03-17 12:52 ` Thomas Huth
2023-03-17 12:36 ` [kvm-unit-tests PATCH 3/7] powerpc: abstract H_CEDE calls into a sleep() function Nicholas Piggin
2023-03-17 13:01 ` Thomas Huth
2023-03-17 12:36 ` [kvm-unit-tests PATCH 4/7] powerpc: Add ISA v3.1 (POWER10) support to SPR test Nicholas Piggin
2023-03-23 11:55 ` Thomas Huth
2023-03-17 12:36 ` Nicholas Piggin [this message]
2023-03-17 12:36 ` [kvm-unit-tests PATCH 6/7] powerpc/sprs: Specify SPRs with data rather than code Nicholas Piggin
2023-03-17 12:36 ` [kvm-unit-tests PATCH 7/7] powerpc/spapr_vpa: Add basic VPA tests Nicholas Piggin
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