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(haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 05C966059A; Wed, 10 May 2023 13:31:30 +1000 (AEST) From: Rohan McLure To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 03/11] asm-generic/mmiowb: Mark accesses to fix KCSAN warnings Date: Wed, 10 May 2023 13:31:09 +1000 Message-Id: <20230510033117.1395895-4-rmclure@linux.ibm.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230510033117.1395895-1-rmclure@linux.ibm.com> References: <20230510033117.1395895-1-rmclure@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Mbdpk-JroTvX-Jtzl22SoqydY1bIim1x X-Proofpoint-GUID: GB6-k8IlB_mVcin_4yPI5CIk_EYmDITr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-09_16,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 phishscore=0 malwarescore=0 mlxlogscore=936 bulkscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305100021 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arnd@arndb.de, gautam@linux.ibm.com, npiggin@gmail.com, Rohan McLure Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Prior to this patch, data races are detectable by KCSAN of the following forms: [1] Asynchronous calls to mmiowb_set_pending() from an interrupt context or otherwise outside of a critical section [2] Interrupted critical sections, where the interrupt will itself acquire a lock In case [1], calling context does not need an mmiowb() call to be issued, otherwise it would do so itself. Such calls to mmiowb_set_pending() are either idempotent or no-ops. In case [2], irrespective of when the interrupt occurs, the interrupt will acquire and release its locks prior to its return, nesting_count will continue balanced. In the worst case, the interrupted critical section during a mmiowb_spin_unlock() call observes an mmiowb to be pending and afterward is interrupted, leading to an extraneous call to mmiowb(). This data race is clearly innocuous. Mark all potentially asynchronous memory accesses with READ_ONCE or WRITE_ONCE, including increments and decrements to nesting_count. This has the effect of removing KCSAN warnings at consumer's callsites. Signed-off-by: Rohan McLure Reported-by: Michael Ellerman Reported-by: Gautam Menghani Tested-by: Gautam Menghani Acked-by: Arnd Bergmann --- v2: Remove extraneous READ_ONCE in mmiowb_set_pending for nesting_count --- include/asm-generic/mmiowb.h | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/include/asm-generic/mmiowb.h b/include/asm-generic/mmiowb.h index 5698fca3bf56..6dea28c8835b 100644 --- a/include/asm-generic/mmiowb.h +++ b/include/asm-generic/mmiowb.h @@ -37,25 +37,29 @@ static inline void mmiowb_set_pending(void) struct mmiowb_state *ms = __mmiowb_state(); if (likely(ms->nesting_count)) - ms->mmiowb_pending = ms->nesting_count; + WRITE_ONCE(ms->mmiowb_pending, ms->nesting_count); } static inline void mmiowb_spin_lock(void) { struct mmiowb_state *ms = __mmiowb_state(); - ms->nesting_count++; + + /* Increment need not be atomic. Nestedness is balanced over interrupts. */ + WRITE_ONCE(ms->nesting_count, READ_ONCE(ms->nesting_count) + 1); } static inline void mmiowb_spin_unlock(void) { struct mmiowb_state *ms = __mmiowb_state(); + u16 pending = READ_ONCE(ms->mmiowb_pending); - if (unlikely(ms->mmiowb_pending)) { - ms->mmiowb_pending = 0; + WRITE_ONCE(ms->mmiowb_pending, 0); + if (unlikely(pending)) { mmiowb(); } - ms->nesting_count--; + /* Decrement need not be atomic. Nestedness is balanced over interrupts. */ + WRITE_ONCE(ms->nesting_count, READ_ONCE(ms->nesting_count) - 1); } #else #define mmiowb_set_pending() do { } while (0) -- 2.37.2