From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CD95CD8CAC for ; Tue, 10 Oct 2023 17:17:26 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=KjfeGlF0; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4S4jJP0rncz3vkD for ; Wed, 11 Oct 2023 04:17:25 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=KjfeGlF0; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linuxfoundation.org (client-ip=145.40.68.75; helo=ams.source.kernel.org; envelope-from=gregkh@linuxfoundation.org; receiver=lists.ozlabs.org) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4S4jH14vlpz3vXV for ; Wed, 11 Oct 2023 04:16:13 +1100 (AEDT) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by ams.source.kernel.org (Postfix) with ESMTP id 70030B81D66; Tue, 10 Oct 2023 17:16:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3D43AC433C8; Tue, 10 Oct 2023 17:16:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1696958169; bh=a+x8Te5gzV4XxTKWewe7fEV8PtaF6rYm/cvaiuepDlQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=KjfeGlF0UJ6DXx3oZyLRJVdL1oufvFQST3r9+ykMZsN12WhBXEReutobcTRYLrezP Z3JkUecNUZ5yAmukh+tnKP+MyQLL6iIrGVRsaOs1qSbPyefIvjdVU49uGoZgm7aaXD 3o5aVSIERl4W5I36SXctSE0u3h4jVtHA+rxzX1g0= Date: Tue, 10 Oct 2023 19:16:07 +0200 From: Greg Kroah-Hartman To: Anup Patel Subject: Re: [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon Message-ID: <2023101053-scholar-resolute-a9a0@gregkh> References: <20231010170503.657189-1-apatel@ventanamicro.com> <20231010170503.657189-5-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231010170503.657189-5-apatel@ventanamicro.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-serial@vger.kernel.org, kvm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Atish Patra , linux-kernel@vger.kernel.org, Conor Dooley , Palmer Dabbelt , kvm-riscv@lists.infradead.org, Paul Walmsley , Paolo Bonzini , linux-riscv@lists.infradead.org, Jiri Slaby , Andrew Jones Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Oct 10, 2023 at 10:35:01PM +0530, Anup Patel wrote: > We extend the existing RISC-V SBI earlycon support to use the new > RISC-V SBI debug console extension. > > Signed-off-by: Anup Patel > --- > drivers/tty/serial/Kconfig | 2 +- > drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++++++++++++++++++++++--- > 2 files changed, 32 insertions(+), 5 deletions(-) > > diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig > index bdc568a4ab66..cec46091a716 100644 > --- a/drivers/tty/serial/Kconfig > +++ b/drivers/tty/serial/Kconfig > @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST > > config SERIAL_EARLYCON_RISCV_SBI > bool "Early console using RISC-V SBI" > - depends on RISCV_SBI_V01 > + depends on RISCV_SBI > select SERIAL_CORE > select SERIAL_CORE_CONSOLE > select SERIAL_EARLYCON > diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c > index 27afb0b74ea7..b1da34e8d8cd 100644 > --- a/drivers/tty/serial/earlycon-riscv-sbi.c > +++ b/drivers/tty/serial/earlycon-riscv-sbi.c > @@ -10,22 +10,49 @@ > #include > #include > > +#ifdef CONFIG_RISCV_SBI_V01 > static void sbi_putc(struct uart_port *port, unsigned char c) > { > sbi_console_putchar(c); > } > > -static void sbi_console_write(struct console *con, > - const char *s, unsigned n) > +static void sbi_0_1_console_write(struct console *con, > + const char *s, unsigned int n) > { > struct earlycon_device *dev = con->data; > uart_console_write(&dev->port, s, n, sbi_putc); > } > +#endif > + > +static void sbi_dbcn_console_write(struct console *con, > + const char *s, unsigned int n) > +{ > + phys_addr_t pa = __pa(s); > + > + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE, > +#ifdef CONFIG_32BIT > + n, pa, (u64)pa >> 32, > +#else > + n, pa, 0, > +#endif Again, no #ifdef in .c files please. thanks, greg k-h