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From: Andrew Jones <ajones@ventanamicro.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: linux-serial@vger.kernel.org, kvm@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Atish Patra <atishp@atishpatra.org>,
	linuxppc-dev@lists.ozlabs.org, Conor Dooley <conor@kernel.org>,
	linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
	kvm-riscv@lists.infradead.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	linux-riscv@lists.infradead.org,
	Jiri Slaby <jirislaby@kernel.org>
Subject: Re: [PATCH v2 1/8] RISC-V: Add defines for SBI debug console extension
Date: Thu, 19 Oct 2023 09:44:59 +0200	[thread overview]
Message-ID: <20231019-5e24c756f19e98cd9d3f89bb@orel> (raw)
In-Reply-To: <20231012051509.738750-2-apatel@ventanamicro.com>

On Thu, Oct 12, 2023 at 10:45:02AM +0530, Anup Patel wrote:
> We add SBI debug console extension related defines/enum to the
> asm/sbi.h header.
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  arch/riscv/include/asm/sbi.h | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 5b4a1bf5f439..12dfda6bb924 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -30,6 +30,7 @@ enum sbi_ext_id {
>  	SBI_EXT_HSM = 0x48534D,
>  	SBI_EXT_SRST = 0x53525354,
>  	SBI_EXT_PMU = 0x504D55,
> +	SBI_EXT_DBCN = 0x4442434E,
>  
>  	/* Experimentals extensions must lie within this range */
>  	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
> @@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
>  /* Flags defined for counter stop function */
>  #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
>  
> +enum sbi_ext_dbcn_fid {
> +	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
> +	SBI_EXT_DBCN_CONSOLE_READ = 1,
> +	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
> +};
> +
>  #define SBI_SPEC_VERSION_DEFAULT	0x1
>  #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
>  #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
> -- 
> 2.34.1
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

  reply	other threads:[~2023-10-19  7:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-12  5:15 [PATCH v2 0/8] RISC-V SBI debug console extension support Anup Patel
2023-10-12  5:15 ` [PATCH v2 1/8] RISC-V: Add defines for SBI debug console extension Anup Patel
2023-10-19  7:44   ` Andrew Jones [this message]
2023-10-12  5:15 ` [PATCH v2 2/8] RISC-V: KVM: Change the SBI specification version to v2.0 Anup Patel
2023-10-19  7:46   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 3/8] RISC-V: KVM: Allow some SBI extensions to be disabled by default Anup Patel
2023-10-19  7:57   ` Andrew Jones
2023-10-20  5:26     ` Anup Patel
2023-10-12  5:15 ` [PATCH v2 4/8] RISC-V: KVM: Forward SBI DBCN extension to user-space Anup Patel
2023-10-19  8:01   ` Andrew Jones
2023-10-19  9:17   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 5/8] RISC-V: Add inline version of sbi_console_putchar/getchar() functions Anup Patel
2023-10-19  8:03   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 6/8] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
2023-10-19  8:27   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 7/8] tty: Add SBI debug console support to HVC SBI driver Anup Patel
2023-10-12 11:38   ` Björn Töpel
2023-10-13 15:41     ` Anup Patel
2023-10-12  5:15 ` [PATCH v2 8/8] RISC-V: Enable SBI based earlycon support Anup Patel
2023-10-19  8:46   ` Andrew Jones

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