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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c028100b004077219aed5sm3630164wmk.6.2023.10.19.00.45.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Oct 2023 00:45:00 -0700 (PDT) Date: Thu, 19 Oct 2023 09:44:59 +0200 From: Andrew Jones To: Anup Patel Subject: Re: [PATCH v2 1/8] RISC-V: Add defines for SBI debug console extension Message-ID: <20231019-5e24c756f19e98cd9d3f89bb@orel> References: <20231012051509.738750-1-apatel@ventanamicro.com> <20231012051509.738750-2-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231012051509.738750-2-apatel@ventanamicro.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-serial@vger.kernel.org, kvm@vger.kernel.org, Greg Kroah-Hartman , Atish Patra , linuxppc-dev@lists.ozlabs.org, Conor Dooley , linux-kernel@vger.kernel.org, Palmer Dabbelt , kvm-riscv@lists.infradead.org, Paul Walmsley , Paolo Bonzini , linux-riscv@lists.infradead.org, Jiri Slaby Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Oct 12, 2023 at 10:45:02AM +0530, Anup Patel wrote: > We add SBI debug console extension related defines/enum to the > asm/sbi.h header. > > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/sbi.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 5b4a1bf5f439..12dfda6bb924 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -30,6 +30,7 @@ enum sbi_ext_id { > SBI_EXT_HSM = 0x48534D, > SBI_EXT_SRST = 0x53525354, > SBI_EXT_PMU = 0x504D55, > + SBI_EXT_DBCN = 0x4442434E, > > /* Experimentals extensions must lie within this range */ > SBI_EXT_EXPERIMENTAL_START = 0x08000000, > @@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type { > /* Flags defined for counter stop function */ > #define SBI_PMU_STOP_FLAG_RESET (1 << 0) > > +enum sbi_ext_dbcn_fid { > + SBI_EXT_DBCN_CONSOLE_WRITE = 0, > + SBI_EXT_DBCN_CONSOLE_READ = 1, > + SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2, > +}; > + > #define SBI_SPEC_VERSION_DEFAULT 0x1 > #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 > #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > -- > 2.34.1 > Reviewed-by: Andrew Jones