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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id f17-20020a1709062c5100b009c5c5c2c5a4sm1205348ejh.219.2023.10.20.03.46.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Oct 2023 03:46:47 -0700 (PDT) Date: Fri, 20 Oct 2023 12:46:46 +0200 From: Andrew Jones To: Anup Patel Subject: Re: [PATCH v3 8/9] tty: Add SBI debug console support to HVC SBI driver Message-ID: <20231020-f1ec2b7e384a4cfeae39966f@orel> References: <20231020072140.900967-1-apatel@ventanamicro.com> <20231020072140.900967-9-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231020072140.900967-9-apatel@ventanamicro.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-serial@vger.kernel.org, kvm@vger.kernel.org, Greg Kroah-Hartman , Atish Patra , Atish Patra , linuxppc-dev@lists.ozlabs.org, Conor Dooley , linux-kernel@vger.kernel.org, Palmer Dabbelt , kvm-riscv@lists.infradead.org, Paul Walmsley , Paolo Bonzini , linux-riscv@lists.infradead.org, Jiri Slaby Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Oct 20, 2023 at 12:51:39PM +0530, Anup Patel wrote: > From: Atish Patra > > RISC-V SBI specification supports advanced debug console > support via SBI DBCN extension. > > Extend the HVC SBI driver to support it. > > Signed-off-by: Atish Patra > Signed-off-by: Anup Patel > --- > drivers/tty/hvc/Kconfig | 2 +- > drivers/tty/hvc/hvc_riscv_sbi.c | 82 ++++++++++++++++++++++++++++++--- > 2 files changed, 76 insertions(+), 8 deletions(-) > > diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig > index 4f9264d005c0..6e05c5c7bca1 100644 > --- a/drivers/tty/hvc/Kconfig > +++ b/drivers/tty/hvc/Kconfig > @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP > > config HVC_RISCV_SBI > bool "RISC-V SBI console support" > - depends on RISCV_SBI_V01 > + depends on RISCV_SBI > select HVC_DRIVER > help > This enables support for console output via RISC-V SBI calls, which > diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c > index 31f53fa77e4a..56da1a4b5aca 100644 > --- a/drivers/tty/hvc/hvc_riscv_sbi.c > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c > @@ -39,21 +39,89 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int count) > return i; > } > > -static const struct hv_ops hvc_sbi_ops = { > +static const struct hv_ops hvc_sbi_v01_ops = { > .get_chars = hvc_sbi_tty_get, > .put_chars = hvc_sbi_tty_put, > }; > > -static int __init hvc_sbi_init(void) > +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count) > { > - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16)); > + phys_addr_t pa; > + struct sbiret ret; > + > + if (is_vmalloc_addr(buf)) { > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf); > + if (PAGE_SIZE < (offset_in_page(buf) + count)) I thought checkpatch complained about uppercase constants being on the left in comparisons. > + count = PAGE_SIZE - offset_in_page(buf); > + } else { > + pa = __pa(buf); > + } > + > + if (IS_ENABLED(CONFIG_32BIT)) > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE, > + count, lower_32_bits(pa), upper_32_bits(pa), > + 0, 0, 0); > + else > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE, > + count, pa, 0, 0, 0, 0); > + if (ret.error) > + return 0; > + > + return count; Shouldn't we return ret.value here in case it's less than count? I see we already do that below in get(). > } > -device_initcall(hvc_sbi_init); > > -static int __init hvc_sbi_console_init(void) > +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count) > { > - hvc_instantiate(0, 0, &hvc_sbi_ops); > + phys_addr_t pa; > + struct sbiret ret; > + > + if (is_vmalloc_addr(buf)) { > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf); > + if (PAGE_SIZE < (offset_in_page(buf) + count)) > + count = PAGE_SIZE - offset_in_page(buf); > + } else { > + pa = __pa(buf); > + } > + > + if (IS_ENABLED(CONFIG_32BIT)) > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ, > + count, lower_32_bits(pa), upper_32_bits(pa), > + 0, 0, 0); > + else > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ, > + count, pa, 0, 0, 0, 0); > + if (ret.error) > + return 0; > + > + return ret.value; > +} > + > +static const struct hv_ops hvc_sbi_dbcn_ops = { > + .put_chars = hvc_sbi_dbcn_tty_put, > + .get_chars = hvc_sbi_dbcn_tty_get, > +}; > + > +static int __init hvc_sbi_init(void) > +{ > + int err; > + > + if ((sbi_spec_version >= sbi_mk_version(2, 0)) && > + (sbi_probe_extension(SBI_EXT_DBCN) > 0)) { > + err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 16)); Why an outbuf size of only 16? > + if (err) > + return err; > + hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops); > + } else { > + if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) { > + err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 16)); > + if (err) > + return err; > + hvc_instantiate(0, 0, &hvc_sbi_v01_ops); > + } else { > + return -ENODEV; > + } > + } > > return 0; > } > -console_initcall(hvc_sbi_console_init); > +device_initcall(hvc_sbi_init); > -- > 2.34.1 > Thanks, drew