From: Herve Codina <herve.codina@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>,
Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
Jakub Kicinski <kuba@kernel.org>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: alsa-devel@alsa-project.org, Arnd Bergmann <arnd@arndb.de>,
linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 12/17] soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries
Date: Tue, 28 Nov 2023 15:08:11 +0100 [thread overview]
Message-ID: <20231128140818.261541-13-herve.codina@bootlin.com> (raw)
In-Reply-To: <20231128140818.261541-1-herve.codina@bootlin.com>
In order to allow runtime timeslot route changes, disabling channel TSA
entries needs to be supported.
Add support for this new feature.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
drivers/soc/fsl/qe/qmc.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
index 8d71e63d0f21..c1318fad296b 100644
--- a/drivers/soc/fsl/qe/qmc.c
+++ b/drivers/soc/fsl/qe/qmc.c
@@ -567,7 +567,8 @@ static void qmc_chan_read_done(struct qmc_chan *chan)
spin_unlock_irqrestore(&chan->rx_lock, flags);
}
-static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info)
+static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info,
+ bool enable)
{
unsigned int i;
u16 curr;
@@ -603,13 +604,14 @@ static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_ser
continue;
qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
- ~QMC_TSA_WRAP, val);
+ ~QMC_TSA_WRAP, enable ? val : 0x0000);
}
return 0;
}
-static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info)
+static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info,
+ bool enable)
{
unsigned int i;
u16 curr;
@@ -650,7 +652,7 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
continue;
qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
- ~QMC_TSA_WRAP, val);
+ ~QMC_TSA_WRAP, enable ? val : 0x0000);
}
/* Set entries based on Tx stuff */
for (i = 0; i < info->nb_tx_ts; i++) {
@@ -658,13 +660,13 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
continue;
qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2),
- ~QMC_TSA_WRAP, val);
+ ~QMC_TSA_WRAP, enable ? val : 0x0000);
}
return 0;
}
-static int qmc_chan_setup_tsa(struct qmc_chan *chan)
+static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
{
struct tsa_serial_info info;
int ret;
@@ -679,8 +681,8 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan)
* and one for Tx) according to assigned TS numbers.
*/
return ((info.nb_tx_ts > 32) || (info.nb_rx_ts > 32)) ?
- qmc_chan_setup_tsa_64rxtx(chan, &info) :
- qmc_chan_setup_tsa_32rx_32tx(chan, &info);
+ qmc_chan_setup_tsa_64rxtx(chan, &info, enable) :
+ qmc_chan_setup_tsa_32rx_32tx(chan, &info, enable);
}
static int qmc_chan_command(struct qmc_chan *chan, u8 qmc_opcode)
@@ -1146,7 +1148,7 @@ static int qmc_setup_chan(struct qmc *qmc, struct qmc_chan *chan)
chan->qmc = qmc;
- ret = qmc_chan_setup_tsa(chan);
+ ret = qmc_chan_setup_tsa(chan, true);
if (ret)
return ret;
--
2.42.0
next prev parent reply other threads:[~2023-11-28 14:19 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 14:07 [PATCH 00/17] Prepare the PowerQUICC QMC and TSA for the HDLC QMC driver Herve Codina
2023-11-28 14:08 ` [PATCH 01/17] soc: fsl: cpm1: tsa: Fix __iomem addresses declaration Herve Codina
2023-11-28 14:08 ` [PATCH 02/17] soc: fsl: cpm1: qmc: " Herve Codina
2023-11-28 14:08 ` [PATCH 03/17] soc: fsl: cpm1: qmc: Fix rx channel reset Herve Codina
2023-11-28 14:08 ` [PATCH 04/17] soc: fsl: cpm1: qmc: Extend the API to provide Rx status Herve Codina
2023-11-28 14:08 ` [PATCH 05/17] soc: fsl: cpm1: qmc: Remove inline function specifiers Herve Codina
2023-11-28 14:08 ` [PATCH 06/17] soc: fsl: cpm1: qmc: Add support for child devices Herve Codina
2023-11-28 14:08 ` [PATCH 07/17] soc: fsl: cpm1: qmc: Introduce available timeslots masks Herve Codina
2023-11-28 14:08 ` [PATCH 08/17] soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa* Herve Codina
2023-11-28 14:08 ` [PATCH 09/17] soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa* Herve Codina
2023-11-28 14:08 ` [PATCH 10/17] soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans() Herve Codina
2023-11-28 14:08 ` [PATCH 11/17] soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans() Herve Codina
2023-11-28 14:08 ` Herve Codina [this message]
2023-11-28 14:08 ` [PATCH 13/17] soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setup Herve Codina
2023-11-28 14:08 ` [PATCH 14/17] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag Herve Codina
2023-11-28 14:08 ` [PATCH 15/17] soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop() Herve Codina
2023-11-29 14:03 ` Arnd Bergmann
2023-12-01 8:41 ` Herve Codina
2023-11-28 14:08 ` [PATCH 16/17] soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan() Herve Codina
2023-11-28 14:08 ` [PATCH 17/17] soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime Herve Codina
2023-11-29 14:09 ` [PATCH 00/17] Prepare the PowerQUICC QMC and TSA for the HDLC QMC driver Arnd Bergmann
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231128140818.261541-13-herve.codina@bootlin.com \
--to=herve.codina@bootlin.com \
--cc=Xiubo.Lee@gmail.com \
--cc=alsa-devel@alsa-project.org \
--cc=arnd@arndb.de \
--cc=broonie@kernel.org \
--cc=christophe.leroy@csgroup.eu \
--cc=festevam@gmail.com \
--cc=kuba@kernel.org \
--cc=leoyang.li@nxp.com \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=nicoleotsuka@gmail.com \
--cc=perex@perex.cz \
--cc=qiang.zhao@nxp.com \
--cc=shengjiu.wang@gmail.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=tiwai@suse.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).