From: Herve Codina <herve.codina@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>,
Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
Jakub Kicinski <kuba@kernel.org>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: alsa-devel@alsa-project.org, Arnd Bergmann <arnd@arndb.de>,
linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 14/17] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag
Date: Tue, 28 Nov 2023 15:08:13 +0100 [thread overview]
Message-ID: <20231128140818.261541-15-herve.codina@bootlin.com> (raw)
In-Reply-To: <20231128140818.261541-1-herve.codina@bootlin.com>
In order to support runtime timeslot route changes, some operations will
be different according the routing table used (common Rx and Tx table or
one table for Rx and one for Tx).
The is_tsa_64rxtx flag is introduced to avoid extra computation to
determine the table format each time we need it.
It is set once at initialization.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
drivers/soc/fsl/qe/qmc.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
index 5ca4120779f8..e651b3bba1ca 100644
--- a/drivers/soc/fsl/qe/qmc.c
+++ b/drivers/soc/fsl/qe/qmc.c
@@ -216,6 +216,7 @@ struct qmc {
u16 __iomem *int_curr;
dma_addr_t int_dma_addr;
size_t int_size;
+ bool is_tsa_64rxtx;
struct list_head chan_head;
struct qmc_chan *chans[64];
};
@@ -696,7 +697,7 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
* Setup one common 64 entries table or two 32 entries (one for Tx
* and one for Tx) according to assigned TS numbers.
*/
- if (info.nb_tx_ts > 32 || info.nb_rx_ts > 32)
+ if (chan->qmc->is_tsa_64rxtx)
return qmc_chan_setup_tsa_64rxtx(chan, &info, enable);
ret = qmc_chan_setup_tsa_32rx(chan, &info, enable);
@@ -1053,6 +1054,7 @@ static int qmc_init_tsa_64rxtx(struct qmc *qmc, const struct tsa_serial_info *in
* Everything was previously checked, Tx and Rx related stuffs are
* identical -> Used Rx related stuff to build the table
*/
+ qmc->is_tsa_64rxtx = true;
/* Invalidate all entries */
for (i = 0; i < 64; i++)
@@ -1081,6 +1083,7 @@ static int qmc_init_tsa_32rx_32tx(struct qmc *qmc, const struct tsa_serial_info
* Use a Tx 32 entries table and a Rx 32 entries table.
* Everything was previously checked.
*/
+ qmc->is_tsa_64rxtx = false;
/* Invalidate all entries */
for (i = 0; i < 32; i++) {
--
2.42.0
next prev parent reply other threads:[~2023-11-28 14:20 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 14:07 [PATCH 00/17] Prepare the PowerQUICC QMC and TSA for the HDLC QMC driver Herve Codina
2023-11-28 14:08 ` [PATCH 01/17] soc: fsl: cpm1: tsa: Fix __iomem addresses declaration Herve Codina
2023-11-28 14:08 ` [PATCH 02/17] soc: fsl: cpm1: qmc: " Herve Codina
2023-11-28 14:08 ` [PATCH 03/17] soc: fsl: cpm1: qmc: Fix rx channel reset Herve Codina
2023-11-28 14:08 ` [PATCH 04/17] soc: fsl: cpm1: qmc: Extend the API to provide Rx status Herve Codina
2023-11-28 14:08 ` [PATCH 05/17] soc: fsl: cpm1: qmc: Remove inline function specifiers Herve Codina
2023-11-28 14:08 ` [PATCH 06/17] soc: fsl: cpm1: qmc: Add support for child devices Herve Codina
2023-11-28 14:08 ` [PATCH 07/17] soc: fsl: cpm1: qmc: Introduce available timeslots masks Herve Codina
2023-11-28 14:08 ` [PATCH 08/17] soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa* Herve Codina
2023-11-28 14:08 ` [PATCH 09/17] soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa* Herve Codina
2023-11-28 14:08 ` [PATCH 10/17] soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans() Herve Codina
2023-11-28 14:08 ` [PATCH 11/17] soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans() Herve Codina
2023-11-28 14:08 ` [PATCH 12/17] soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries Herve Codina
2023-11-28 14:08 ` [PATCH 13/17] soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setup Herve Codina
2023-11-28 14:08 ` Herve Codina [this message]
2023-11-28 14:08 ` [PATCH 15/17] soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop() Herve Codina
2023-11-29 14:03 ` Arnd Bergmann
2023-12-01 8:41 ` Herve Codina
2023-11-28 14:08 ` [PATCH 16/17] soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan() Herve Codina
2023-11-28 14:08 ` [PATCH 17/17] soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime Herve Codina
2023-11-29 14:09 ` [PATCH 00/17] Prepare the PowerQUICC QMC and TSA for the HDLC QMC driver Arnd Bergmann
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231128140818.261541-15-herve.codina@bootlin.com \
--to=herve.codina@bootlin.com \
--cc=Xiubo.Lee@gmail.com \
--cc=alsa-devel@alsa-project.org \
--cc=arnd@arndb.de \
--cc=broonie@kernel.org \
--cc=christophe.leroy@csgroup.eu \
--cc=festevam@gmail.com \
--cc=kuba@kernel.org \
--cc=leoyang.li@nxp.com \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=nicoleotsuka@gmail.com \
--cc=perex@perex.cz \
--cc=qiang.zhao@nxp.com \
--cc=shengjiu.wang@gmail.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=tiwai@suse.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).