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From: Herve Codina <herve.codina@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>,
	Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
	Jakub Kicinski <kuba@kernel.org>,
	Shengjiu Wang <shengjiu.wang@gmail.com>,
	Xiubo Li <Xiubo.Lee@gmail.com>,
	Fabio Estevam <festevam@gmail.com>,
	Nicolin Chen <nicoleotsuka@gmail.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
	Takashi Iwai <tiwai@suse.com>,
	Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: alsa-devel@alsa-project.org, Arnd Bergmann <arnd@arndb.de>,
	linux-kernel@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linuxppc-dev@lists.ozlabs.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/17] soc: fsl: cpm1: tsa: Fix __iomem addresses declaration
Date: Tue, 28 Nov 2023 15:08:00 +0100	[thread overview]
Message-ID: <20231128140818.261541-2-herve.codina@bootlin.com> (raw)
In-Reply-To: <20231128140818.261541-1-herve.codina@bootlin.com>

Running sparse (make C=1) on tsa.c raises a lot of warning such as:
  --- 8< ---
  warning: incorrect type in assignment (different address spaces)
     expected void *[noderef] si_regs
     got void [noderef] __iomem *
  --- 8< ---

Indeed, some variable were declared 'type *__iomem var' instead of
'type __iomem *var'.

Use the correct declaration to remove these warnings.

Fixes: 1d4ba0b81c1c ("soc: fsl: cpm1: Add support for TSA")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 drivers/soc/fsl/qe/tsa.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
index 3f9981335590..6c5741cf5e9d 100644
--- a/drivers/soc/fsl/qe/tsa.c
+++ b/drivers/soc/fsl/qe/tsa.c
@@ -98,9 +98,9 @@
 #define TSA_SIRP	0x10
 
 struct tsa_entries_area {
-	void *__iomem entries_start;
-	void *__iomem entries_next;
-	void *__iomem last_entry;
+	void __iomem *entries_start;
+	void __iomem *entries_next;
+	void __iomem *last_entry;
 };
 
 struct tsa_tdm {
@@ -117,8 +117,8 @@ struct tsa_tdm {
 
 struct tsa {
 	struct device *dev;
-	void *__iomem si_regs;
-	void *__iomem si_ram;
+	void __iomem *si_regs;
+	void __iomem *si_ram;
 	resource_size_t si_ram_sz;
 	spinlock_t	lock;
 	int tdms; /* TSA_TDMx ORed */
@@ -135,27 +135,27 @@ static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial)
 	return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]);
 }
 
-static inline void tsa_write32(void *__iomem addr, u32 val)
+static inline void tsa_write32(void __iomem *addr, u32 val)
 {
 	iowrite32be(val, addr);
 }
 
-static inline void tsa_write8(void *__iomem addr, u32 val)
+static inline void tsa_write8(void __iomem *addr, u32 val)
 {
 	iowrite8(val, addr);
 }
 
-static inline u32 tsa_read32(void *__iomem addr)
+static inline u32 tsa_read32(void __iomem *addr)
 {
 	return ioread32be(addr);
 }
 
-static inline void tsa_clrbits32(void *__iomem addr, u32 clr)
+static inline void tsa_clrbits32(void __iomem *addr, u32 clr)
 {
 	tsa_write32(addr, tsa_read32(addr) & ~clr);
 }
 
-static inline void tsa_clrsetbits32(void *__iomem addr, u32 clr, u32 set)
+static inline void tsa_clrsetbits32(void __iomem *addr, u32 clr, u32 set)
 {
 	tsa_write32(addr, (tsa_read32(addr) & ~clr) | set);
 }
@@ -313,7 +313,7 @@ static u32 tsa_serial_id2csel(struct tsa *tsa, u32 serial_id)
 static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area,
 			 u32 count, u32 serial_id)
 {
-	void *__iomem addr;
+	void __iomem *addr;
 	u32 left;
 	u32 val;
 	u32 cnt;
-- 
2.42.0


  reply	other threads:[~2023-11-28 14:17 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-28 14:07 [PATCH 00/17] Prepare the PowerQUICC QMC and TSA for the HDLC QMC driver Herve Codina
2023-11-28 14:08 ` Herve Codina [this message]
2023-11-28 14:08 ` [PATCH 02/17] soc: fsl: cpm1: qmc: Fix __iomem addresses declaration Herve Codina
2023-11-28 14:08 ` [PATCH 03/17] soc: fsl: cpm1: qmc: Fix rx channel reset Herve Codina
2023-11-28 14:08 ` [PATCH 04/17] soc: fsl: cpm1: qmc: Extend the API to provide Rx status Herve Codina
2023-11-28 14:08 ` [PATCH 05/17] soc: fsl: cpm1: qmc: Remove inline function specifiers Herve Codina
2023-11-28 14:08 ` [PATCH 06/17] soc: fsl: cpm1: qmc: Add support for child devices Herve Codina
2023-11-28 14:08 ` [PATCH 07/17] soc: fsl: cpm1: qmc: Introduce available timeslots masks Herve Codina
2023-11-28 14:08 ` [PATCH 08/17] soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa* Herve Codina
2023-11-28 14:08 ` [PATCH 09/17] soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa* Herve Codina
2023-11-28 14:08 ` [PATCH 10/17] soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans() Herve Codina
2023-11-28 14:08 ` [PATCH 11/17] soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans() Herve Codina
2023-11-28 14:08 ` [PATCH 12/17] soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries Herve Codina
2023-11-28 14:08 ` [PATCH 13/17] soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setup Herve Codina
2023-11-28 14:08 ` [PATCH 14/17] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag Herve Codina
2023-11-28 14:08 ` [PATCH 15/17] soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop() Herve Codina
2023-11-29 14:03   ` Arnd Bergmann
2023-12-01  8:41     ` Herve Codina
2023-11-28 14:08 ` [PATCH 16/17] soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan() Herve Codina
2023-11-28 14:08 ` [PATCH 17/17] soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime Herve Codina
2023-11-29 14:09 ` [PATCH 00/17] Prepare the PowerQUICC QMC and TSA for the HDLC QMC driver Arnd Bergmann

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