From: Nicholas Piggin <npiggin@gmail.com>
To: kvm@vger.kernel.org
Cc: Laurent Vivier <lvivier@redhat.com>,
Thomas Huth <thuth@redhat.com>, Nico Boehr <nrb@linux.ibm.com>,
Shaoqin Huang <shahuang@redhat.com>,
Nicholas Piggin <npiggin@gmail.com>,
Andrew Jones <andrew.jones@linux.dev>,
linuxppc-dev@lists.ozlabs.org
Subject: [kvm-unit-tests PATCH v5 29/29] powerpc: Add timebase tests
Date: Sat, 16 Dec 2023 23:42:56 +1000 [thread overview]
Message-ID: <20231216134257.1743345-30-npiggin@gmail.com> (raw)
In-Reply-To: <20231216134257.1743345-1-npiggin@gmail.com>
This has a known failure on QEMU TCG machines where the decrementer
interrupt is not lowered when the DEC wraps from -ve to +ve.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
lib/powerpc/asm/ppc_asm.h | 1 +
lib/powerpc/asm/processor.h | 22 +++
powerpc/Makefile.common | 1 +
powerpc/smp.c | 22 ---
powerpc/timebase.c | 328 ++++++++++++++++++++++++++++++++++++
powerpc/unittests.cfg | 8 +
6 files changed, 360 insertions(+), 22 deletions(-)
create mode 100644 powerpc/timebase.c
diff --git a/lib/powerpc/asm/ppc_asm.h b/lib/powerpc/asm/ppc_asm.h
index 778e78ee..18b25fe0 100644
--- a/lib/powerpc/asm/ppc_asm.h
+++ b/lib/powerpc/asm/ppc_asm.h
@@ -47,6 +47,7 @@
#define SPR_HSRR1 0x13B
#define SPR_LPCR 0x13E
#define LPCR_HDICE 0x1UL
+#define LPCR_LD 0x20000UL
#define SPR_HEIR 0x153
#define SPR_SIAR 0x31C
diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index 924451da..995656b6 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -45,6 +45,28 @@ static inline void mtmsr(uint64_t msr)
asm volatile ("mtmsrd %[msr]" :: [msr] "r" (msr) : "memory");
}
+static inline void local_irq_enable(void)
+{
+ unsigned long msr;
+
+ asm volatile(
+" mfmsr %0 \n \
+ ori %0,%0,%1 \n \
+ mtmsrd %0,1 "
+ : "=r"(msr) : "i"(MSR_EE): "memory");
+}
+
+static inline void local_irq_disable(void)
+{
+ unsigned long msr;
+
+ asm volatile(
+" mfmsr %0 \n \
+ andc %0,%0,%1 \n \
+ mtmsrd %0,1 "
+ : "=r"(msr) : "r"(MSR_EE): "memory");
+}
+
/*
* This returns true on PowerNV / OPAL machines which run in hypervisor
* mode. False on pseries / PAPR machines that run in guest mode.
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index 697f5735..448b0ded 100644
--- a/powerpc/Makefile.common
+++ b/powerpc/Makefile.common
@@ -14,6 +14,7 @@ tests-common = \
$(TEST_DIR)/tm.elf \
$(TEST_DIR)/smp.elf \
$(TEST_DIR)/sprs.elf \
+ $(TEST_DIR)/timebase.elf \
$(TEST_DIR)/interrupts.elf
tests-all = $(tests-common) $(tests)
diff --git a/powerpc/smp.c b/powerpc/smp.c
index b0a99069..60503977 100644
--- a/powerpc/smp.c
+++ b/powerpc/smp.c
@@ -43,28 +43,6 @@ static void ipi_handler(struct pt_regs *regs, void *data)
atomic_fetch_inc(&nr_cpus_ipi);
}
-static void local_irq_enable(void)
-{
- unsigned long msr;
-
- asm volatile(
-" mfmsr %0 \n \
- ori %0,%0,%1 \n \
- mtmsrd %0,1 "
- : "=r"(msr) : "i"(MSR_EE): "memory");
-}
-
-static void local_irq_disable(void)
-{
- unsigned long msr;
-
- asm volatile(
-" mfmsr %0 \n \
- andc %0,%0,%1 \n \
- mtmsrd %0,1 "
- : "=r"(msr) : "r"(MSR_EE): "memory");
-}
-
static volatile bool ipi_test_running = true;
static void ipi_fn(int cpu_id)
diff --git a/powerpc/timebase.c b/powerpc/timebase.c
new file mode 100644
index 00000000..4d80ea09
--- /dev/null
+++ b/powerpc/timebase.c
@@ -0,0 +1,328 @@
+/*
+ * Test Timebase
+ *
+ * Copyright 2017 Thomas Huth, Red Hat Inc.
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2.
+ *
+ * This contains tests of timebase facility, TB, DEC, etc.
+ */
+#include <libcflat.h>
+#include <util.h>
+#include <migrate.h>
+#include <alloc.h>
+#include <asm/handlers.h>
+#include <devicetree.h>
+#include <asm/hcall.h>
+#include <asm/processor.h>
+#include <asm/barrier.h>
+
+static int dec_bits = 0;
+
+static void cpu_dec_bits(int fdtnode, u64 regval __unused, void *arg __unused)
+{
+ const struct fdt_property *prop;
+ int plen;
+
+ prop = fdt_get_property(dt_fdt(), fdtnode, "ibm,dec-bits", &plen);
+ if (!prop) {
+ dec_bits = 32;
+ return;
+ }
+
+ /* Sanity check for the property layout (first two bytes are header) */
+ assert(plen == 4);
+
+ dec_bits = fdt32_to_cpu(*(uint32_t *)prop->data);
+}
+
+/* Check amount of CPUs nodes that have the TM flag */
+static int find_dec_bits(void)
+{
+ int ret;
+
+ ret = dt_for_each_cpu_node(cpu_dec_bits, NULL);
+ if (ret < 0)
+ return ret;
+
+ return dec_bits;
+}
+
+
+static bool do_migrate = false;
+static volatile bool got_interrupt;
+static volatile struct pt_regs recorded_regs;
+
+static uint64_t dec_max;
+static uint64_t dec_min;
+
+static void test_tb(int argc, char **argv)
+{
+ uint64_t tb;
+
+ tb = get_tb();
+ if (do_migrate)
+ migrate();
+ report(get_tb() >= tb, "timebase is incrementing");
+}
+
+static void dec_stop_handler(struct pt_regs *regs, void *data)
+{
+ mtspr(SPR_DEC, dec_max);
+}
+
+static void dec_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+ memcpy((void *)&recorded_regs, regs, sizeof(struct pt_regs));
+ regs->msr &= ~MSR_EE;
+}
+
+static void test_dec(int argc, char **argv)
+{
+ uint64_t tb1, tb2, dec;
+
+ handle_exception(0x900, &dec_handler, NULL);
+
+ tb1 = get_tb();
+ mtspr(SPR_DEC, dec_max);
+ dec = mfspr(SPR_DEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - dec, "decrementer remains within TB");
+ assert(tb2 - tb1 >= dec_max - dec);
+
+ tb1 = get_tb();
+ mtspr(SPR_DEC, dec_max);
+ mdelay(1000);
+ dec = mfspr(SPR_DEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - dec, "decrementer remains within TB after 1s");
+ assert(tb2 - tb1 >= dec_max - dec);
+
+ mtspr(SPR_DEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ if (mfspr(SPR_DEC) <= dec_max) {
+ report(!got_interrupt, "no interrupt on decrementer positive");
+ }
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, 1);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer underflow");
+ got_interrupt = false;
+
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer still underflown");
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, 0);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "DEC deal with set to 0");
+ got_interrupt = false;
+
+ /* Test for level-triggered decrementer */
+ mtspr(SPR_DEC, -1ULL);
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer write MSB");
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, dec_max);
+ local_irq_enable();
+ if (do_migrate)
+ migrate();
+ mtspr(SPR_DEC, -1);
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer write MSB with irqs on");
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, dec_min + 1);
+ mdelay(100);
+ local_irq_enable();
+ local_irq_disable();
+ report(!got_interrupt, "no interrupt after wrap to positive");
+ got_interrupt = false;
+
+ handle_exception(0x900, NULL, NULL);
+}
+
+static void test_hdec(int argc, char **argv)
+{
+ uint64_t tb1, tb2, hdec;
+
+ if (!machine_is_powernv()) {
+ report_skip("skipping on !powernv machine");
+ return;
+ }
+
+ handle_exception(0x900, &dec_stop_handler, NULL);
+ handle_exception(0x980, &dec_handler, NULL);
+
+ mtspr(SPR_HDEC, dec_max);
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_HDICE);
+
+ tb1 = get_tb();
+ mtspr(SPR_HDEC, dec_max);
+ hdec = mfspr(SPR_HDEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - hdec, "hdecrementer remains within TB");
+ assert(tb2 - tb1 >= dec_max - hdec);
+
+ tb1 = get_tb();
+ mtspr(SPR_HDEC, dec_max);
+ mdelay(1000);
+ hdec = mfspr(SPR_HDEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - hdec, "hdecrementer remains within TB after 1s");
+ assert(tb2 - tb1 >= dec_max - hdec);
+
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ if (mfspr(SPR_HDEC) <= dec_max) {
+ report(!got_interrupt, "no interrupt on decrementer positive");
+ }
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, 1);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ /* HDEC is edge triggered so ensure it still fires */
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on hdecrementer underflow");
+ got_interrupt = false;
+
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(!got_interrupt, "no interrupt on hdecrementer still underflown");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, -1ULL);
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "no interrupt on hdecrementer underflown write MSB");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, 0);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ /* HDEC is edge triggered so ensure it still fires */
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "HDEC deal with set to 0");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ if (do_migrate)
+ migrate();
+ mtspr(SPR_HDEC, -1ULL);
+ local_irq_disable();
+ report(got_interrupt, "interrupt on hdecrementer write MSB with irqs on");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, dec_max);
+ got_interrupt = false;
+ mtspr(SPR_HDEC, dec_min + 1);
+ if (do_migrate)
+ migrate();
+ mdelay(100);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "got interrupt after wrap to positive");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, -1ULL);
+ local_irq_enable();
+ local_irq_disable();
+ got_interrupt = false;
+ mtspr(SPR_HDEC, dec_min + 1000000);
+ if (do_migrate)
+ migrate();
+ mdelay(100);
+ mtspr(SPR_HDEC, -1ULL);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "edge re-armed after wrap to positive");
+ got_interrupt = false;
+
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) & ~LPCR_HDICE);
+
+ handle_exception(0x900, NULL, NULL);
+ handle_exception(0x980, NULL, NULL);
+}
+
+struct {
+ const char *name;
+ void (*func)(int argc, char **argv);
+} hctests[] = {
+ { "tb", test_tb },
+ { "dec", test_dec },
+ { "hdec", test_hdec },
+ { NULL, NULL }
+};
+
+int main(int argc, char **argv)
+{
+ bool all;
+ int i;
+
+ all = argc == 1 || !strcmp(argv[1], "all");
+
+ for (i = 1; i < argc; i++) {
+ if (!strcmp(argv[i], "-w")) {
+ do_migrate = true;
+ if (!all && argc == 2)
+ all = true;
+ }
+ }
+
+ find_dec_bits();
+ dec_max = (1ULL << (dec_bits - 1)) - 1;
+ dec_min = (1ULL << (dec_bits - 1));
+
+ if (machine_is_powernv() && dec_bits > 32) {
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_LD);
+ }
+
+ report_prefix_push("timebase");
+
+ for (i = 0; hctests[i].name != NULL; i++) {
+ if (all || strcmp(argv[1], hctests[i].name) == 0) {
+ report_prefix_push(hctests[i].name);
+ hctests[i].func(argc, argv);
+ report_prefix_pop();
+ }
+ }
+
+ report_prefix_pop();
+
+ if (machine_is_powernv() && dec_bits > 32) {
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) & ~LPCR_LD);
+ }
+
+ return report_summary();
+}
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 9f71ea93..882d48da 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -89,6 +89,14 @@ machine = pseries
extra_params = -append '-m'
groups = migration
+[timebase]
+file = timebase.elf
+
+[timebase-icount]
+file = timebase.elf
+accel = tcg
+extra_params = -icount shift=0
+
[h_cede_tm]
file = tm.elf
machine = pseries
--
2.42.0
next prev parent reply other threads:[~2023-12-16 14:07 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-16 13:42 [kvm-unit-tests PATCH v5 00/29] powerpc: updates, P10, PNV support Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 01/29] arch-run: Clean up temporary files properly Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 02/29] arch-run: Clean up initrd cleanup Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 03/29] migration: use a more robust way to wait for background job Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 04/29] migration: Support multiple migrations Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 05/29] arch-run: rename migration variables Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 06/29] powerpc: Quiet QEMU TCG pseries capability warnings Nicholas Piggin
2023-12-19 5:55 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 07/29] powerpc: Add a migration stress tester Nicholas Piggin
2023-12-19 5:58 ` Thomas Huth
2023-12-22 10:32 ` Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 08/29] powerpc: Require KVM for the TM test Nicholas Piggin
2023-12-19 5:59 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 09/29] powerpc: Fix interrupt stack alignment Nicholas Piggin
2023-12-19 6:09 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 10/29] powerpc/sprs: Specify SPRs with data rather than code Nicholas Piggin
2023-12-19 6:14 ` Thomas Huth
2023-12-22 10:32 ` Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 11/29] powerpc/sprs: Don't fail changed SPRs that are used by the test harness Nicholas Piggin
2023-12-19 11:34 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 12/29] powerpc/sprs: Avoid taking async interrupts caused by register fuzzing Nicholas Piggin
2023-12-19 11:47 ` Thomas Huth
2023-12-22 9:51 ` Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 13/29] powerpc: Make interrupt handler error more readable Nicholas Piggin
2023-12-19 11:53 ` Thomas Huth
2023-12-22 9:52 ` Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 14/29] powerpc: Expand exception handler vector granularity Nicholas Piggin
2023-12-19 11:55 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 15/29] powerpc: Add support for more interrupts including HV interrupts Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 16/29] powerpc: Set .got section alignment to 256 bytes Nicholas Piggin
2023-12-19 12:01 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 17/29] powerpc: Discover runtime load address dynamically Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 18/29] powerpc: Fix stack backtrace termination Nicholas Piggin
2023-12-19 12:22 ` Thomas Huth
2023-12-22 9:55 ` Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 19/29] scripts: allow machine option to be specified in unittests.cfg Nicholas Piggin
2023-12-19 12:27 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 20/29] scripts: Accommodate powerpc powernv machine differences Nicholas Piggin
2023-12-19 12:36 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 21/29] powerpc: Support powernv machine with QEMU TCG Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 22/29] powerpc: Fix emulator illegal instruction test for powernv Nicholas Piggin
2023-12-19 12:39 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 23/29] powerpc/sprs: Test hypervisor registers on powernv machine Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 24/29] powerpc: interrupt tests Nicholas Piggin
2023-12-19 13:57 ` Thomas Huth
2023-12-22 9:58 ` Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 25/29] powerpc: Add rtas stop-self support Nicholas Piggin
2023-12-19 14:15 ` Thomas Huth
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 26/29] powerpc: add SMP and IPI support Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 27/29] powerpc: Avoid using larx/stcx. in spinlocks when only one CPU is running Nicholas Piggin
2023-12-16 13:42 ` [kvm-unit-tests PATCH v5 28/29] powerpc: Add atomics tests Nicholas Piggin
2023-12-16 13:42 ` Nicholas Piggin [this message]
2023-12-19 14:23 ` [kvm-unit-tests PATCH v5 29/29] powerpc: Add timebase tests Thomas Huth
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