From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A79F8C46CD2 for ; Thu, 28 Dec 2023 01:43:15 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256 header.s=google header.b=c+Z08SRH; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4T0rr21Y2jz3bNs for ; Thu, 28 Dec 2023 12:43:14 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256 header.s=google header.b=c+Z08SRH; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sifive.com (client-ip=2607:f8b0:4864:20::434; helo=mail-pf1-x434.google.com; envelope-from=samuel.holland@sifive.com; receiver=lists.ozlabs.org) Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4T0rq61Nbjz2xQD for ; Thu, 28 Dec 2023 12:42:24 +1100 (AEDT) Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6d9bba6d773so2024529b3a.1 for ; Wed, 27 Dec 2023 17:42:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1703727742; x=1704332542; darn=lists.ozlabs.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=LKYKCC0iAyjtmcl9i3gxZmi/p+HZhZfirGb7twXi050=; b=c+Z08SRHD2znXjE2vnysHk4woiOwnIx7oIsyB9A8xcx/8gNd8n8nssuyqQeDa8+AJ6 HY4qr9piS1m9UZo9qfUtRZkl7izcMXz3bwsbkRgOFap7c78fdx7trejehrgPT7mgmXAY SwnWB3CJCwll10NW1zQHdd8vfChr9HvKvfVSYP2FDu9dvK+g4WnGLko9+ZEFmgq1tbbz WTD2wGKp6BOEtP9rmQf7y3iO18fij9nWEG+LQxYFOE3iCdGnYSsb5mjiQF9yPgGyY1Mf DJ8499z8m6RmAn77OG39ppcRa4BzUBtY1f5lGefFDmd5GiLgzFEL115hL/DVd/Ma7HUn OPRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703727742; x=1704332542; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=LKYKCC0iAyjtmcl9i3gxZmi/p+HZhZfirGb7twXi050=; b=L+EJjXwkhU886afmCevwqvmkhuadQ+Gd9+g/CLw/Va42zBJoKD3EM0FFRO/gkwNljH bxzyCUVta2J1WT5Fv+IEToGKfTTTqox8brtjJWrgZhyJsGrjvrFBB6cJ+C9ssFwnbYd2 HmcNwG50Qi71/HMqOUnN8mrOg+cJopqheQ829UjbqEhUq1NadiCJbMFIGXWYT+RAO9UE fJUj5e+VXKwxPcCL5qV6CVsyIpJdY8ORgfh/6qaCmvpwlPM07Nd+SgXVu9VbrKAMganP C0FcPJG2euwT4jz8CEbIzyYHUIaJD263J05rSpfjsGeThe66E+NtSX54brIJComwU2Uv HPjQ== X-Gm-Message-State: AOJu0Yy9btWdIPnJ3ZTh4ia/vFQNiKQ6Tr7XvXx8t9vuQ2w9aCMg3W/Z POz+Ylq1qybjV7Iods7OC6ftKpHvsawvB6lujj/8ryBxVhA= X-Google-Smtp-Source: AGHT+IHZ0/JideaaZYntOkNOqAPh5V/QL/d8QFy5AdTRppdgJDCkExfUqVkpEa+jpNl3GOmHDV7Ddw== X-Received: by 2002:a05:6a00:1d05:b0:6d9:bfb8:e37c with SMTP id a5-20020a056a001d0500b006d9bfb8e37cmr6112797pfx.41.1703727742547; Wed, 27 Dec 2023 17:42:22 -0800 (PST) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id g24-20020aa78758000000b006d49ed3effasm7335440pfo.63.2023.12.27.17.42.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Dec 2023 17:42:22 -0800 (PST) From: Samuel Holland To: linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, x86@kernel.org, linux-riscv@lists.infradead.org, Christoph Hellwig Subject: [PATCH v2 00/14] Unified cross-architecture kernel-mode FPU API Date: Wed, 27 Dec 2023 17:41:50 -0800 Message-ID: <20231228014220.3562640-1-samuel.holland@sifive.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, Samuel Holland , loongarch@lists.linux.dev Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" This series unifies the kernel-mode FPU API across several architectures by wrapping the existing functions (where needed) in consistently-named functions placed in a consistent header location, with mostly the same semantics: they can be called from preemptible or non-preemptible task context, and are not assumed to be reentrant. Architectures are also expected to provide CFLAGS adjustments for compiling FPU-dependent code. For the moment, SIMD/vector units are out of scope for this common API. This allows us to remove the ifdeffery and duplicated Makefile logic at each FPU user. It then implements the common API on RISC-V, and converts a couple of users to the new API: the AMDGPU DRM driver, and the FPU self test. The underlying goal of this series is to allow using newer AMD GPUs (e.g. Navi) on RISC-V boards such as SiFive's HiFive Unmatched. Those GPUs need CONFIG_DRM_AMD_DC_FP to initialize, which requires kernel-mode FPU support. Previous versions: v1: https://lore.kernel.org/linux-kernel/20231208055501.2916202-1-samuel.holland@sifive.com/ v0: https://lore.kernel.org/linux-kernel/20231122030621.3759313-1-samuel.holland@sifive.com/ Changes in v2: - Add documentation explaining the built-time and runtime APIs - Add a linux/fpu.h header for generic isolation enforcement - Remove file name from header comment - Clean up arch/arm64/lib/Makefile, like for arch/arm - Remove RISC-V architecture-specific preprocessor check - Split altivec removal to a separate patch - Use linux/fpu.h instead of asm/fpu.h in consumers - Declare test_fpu() in a header Michael Ellerman (1): drm/amd/display: Only use hard-float, not altivec on powerpc Samuel Holland (13): arch: Add ARCH_HAS_KERNEL_FPU_SUPPORT ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT ARM: crypto: Use CC_FLAGS_FPU for NEON CFLAGS arm64: Implement ARCH_HAS_KERNEL_FPU_SUPPORT arm64: crypto: Use CC_FLAGS_FPU for NEON CFLAGS lib/raid6: Use CC_FLAGS_FPU for NEON CFLAGS LoongArch: Implement ARCH_HAS_KERNEL_FPU_SUPPORT powerpc: Implement ARCH_HAS_KERNEL_FPU_SUPPORT x86: Implement ARCH_HAS_KERNEL_FPU_SUPPORT riscv: Add support for kernel-mode FPU drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT selftests/fpu: Move FP code to a separate translation unit selftests/fpu: Allow building on other architectures Documentation/core-api/floating-point.rst | 78 +++++++++++++++++++ Documentation/core-api/index.rst | 1 + Makefile | 5 ++ arch/Kconfig | 6 ++ arch/arm/Kconfig | 1 + arch/arm/Makefile | 7 ++ arch/arm/include/asm/fpu.h | 15 ++++ arch/arm/lib/Makefile | 3 +- arch/arm64/Kconfig | 1 + arch/arm64/Makefile | 9 ++- arch/arm64/include/asm/fpu.h | 15 ++++ arch/arm64/lib/Makefile | 6 +- arch/loongarch/Kconfig | 1 + arch/loongarch/Makefile | 5 +- arch/loongarch/include/asm/fpu.h | 1 + arch/powerpc/Kconfig | 1 + arch/powerpc/Makefile | 5 +- arch/powerpc/include/asm/fpu.h | 28 +++++++ arch/riscv/Kconfig | 1 + arch/riscv/Makefile | 3 + arch/riscv/include/asm/fpu.h | 16 ++++ arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/kernel_mode_fpu.c | 28 +++++++ arch/x86/Kconfig | 1 + arch/x86/Makefile | 20 +++++ arch/x86/include/asm/fpu.h | 13 ++++ drivers/gpu/drm/amd/display/Kconfig | 2 +- .../gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 35 +-------- drivers/gpu/drm/amd/display/dc/dml/Makefile | 36 +-------- drivers/gpu/drm/amd/display/dc/dml2/Makefile | 36 +-------- include/linux/fpu.h | 12 +++ lib/Kconfig.debug | 2 +- lib/Makefile | 26 +------ lib/raid6/Makefile | 31 ++------ lib/test_fpu.h | 8 ++ lib/{test_fpu.c => test_fpu_glue.c} | 37 ++------- lib/test_fpu_impl.c | 37 +++++++++ 37 files changed, 343 insertions(+), 190 deletions(-) create mode 100644 Documentation/core-api/floating-point.rst create mode 100644 arch/arm/include/asm/fpu.h create mode 100644 arch/arm64/include/asm/fpu.h create mode 100644 arch/powerpc/include/asm/fpu.h create mode 100644 arch/riscv/include/asm/fpu.h create mode 100644 arch/riscv/kernel/kernel_mode_fpu.c create mode 100644 arch/x86/include/asm/fpu.h create mode 100644 include/linux/fpu.h create mode 100644 lib/test_fpu.h rename lib/{test_fpu.c => test_fpu_glue.c} (71%) create mode 100644 lib/test_fpu_impl.c -- 2.42.0