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[142.68.80.239]) by smtp.gmail.com with ESMTPSA id dk13-20020a056214092d00b006852ff71ac2sm5578899qvb.30.2024.01.25.07.50.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jan 2024 07:50:18 -0800 (PST) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1rT1zd-0091pp-BV; Thu, 25 Jan 2024 11:50:17 -0400 Date: Thu, 25 Jan 2024 11:50:17 -0400 From: Jason Gunthorpe To: Shivaprasad G Bhat Subject: Re: [PATCH 1/2] powerpc: iommu: Bring back table group release_ownership() call Message-ID: <20240125155017.GW50608@ziepe.ca> References: <170618450592.3805.8216395093813382208.stgit@ltcd48-lp2.aus.stglab.ibm.com> <170618451433.3805.9015493852395837391.stgit@ltcd48-lp2.aus.stglab.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <170618451433.3805.9015493852395837391.stgit@ltcd48-lp2.aus.stglab.ibm.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jroedel@suse.de, gbatra@linux.vnet.ibm.com, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, aneesh.kumar@kernel.org, tpearson@raptorengineering.com, iommu@lists.linux.dev, npiggin@gmail.com, bgray@linux.ibm.com, naveen.n.rao@linux.ibm.com, vaibhav@linux.ibm.com, linuxppc-dev@lists.ozlabs.org, aik@amd.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Jan 25, 2024 at 06:08:39AM -0600, Shivaprasad G Bhat wrote: > The commit 2ad56efa80db ("powerpc/iommu: Setup a default domain and > remove set_platform_dma_ops") refactored the code removing the > set_platform_dma_ops(). It missed out the table group > release_ownership() call which would have got called otherwise > during the guest shutdown via vfio_group_detach_container(). On > PPC64, this particular call actually sets up the 32-bit TCE table, > and enables the 64-bit DMA bypass etc. Now after guest shutdown, > the subsequent host driver (e.g megaraid-sas) probe post unbind > from vfio-pci fails like, > > megaraid_sas 0031:01:00.0: Warning: IOMMU dma not supported: mask 0x7fffffffffffffff, table unavailable > megaraid_sas 0031:01:00.0: Warning: IOMMU dma not supported: mask 0xffffffff, table unavailable > megaraid_sas 0031:01:00.0: Failed to set DMA mask > megaraid_sas 0031:01:00.0: Failed from megasas_init_fw 6539 > > The patch brings back the call to table_group release_ownership() > call when switching back to PLATFORM domain. > > Fixes: 2ad56efa80db ("powerpc/iommu: Setup a default domain and remove set_platform_dma_ops") > Signed-off-by: Shivaprasad G Bhat > --- > arch/powerpc/kernel/iommu.c | 16 +++++++++++++--- > 1 file changed, 13 insertions(+), 3 deletions(-) > > diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c > index ebe259bdd462..ac7df43fa7ef 100644 > --- a/arch/powerpc/kernel/iommu.c > +++ b/arch/powerpc/kernel/iommu.c > @@ -1296,9 +1296,19 @@ spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain, > if (!grp) > return -ENODEV; > > - table_group = iommu_group_get_iommudata(grp); > - ret = table_group->ops->take_ownership(table_group); > - iommu_group_put(grp); > + if (platform_domain->type == IOMMU_DOMAIN_PLATFORM) { > + ret = 0; > + table_group = iommu_group_get_iommudata(grp); > + /* > + * The domain being set to PLATFORM from earlier > + * BLOCKED. The table_group ownership has to be released. > + */ > + table_group->ops->release_ownership(table_group); > + } else if (platform_domain->type == IOMMU_DOMAIN_BLOCKED) { > + table_group = iommu_group_get_iommudata(grp); > + ret = table_group->ops->take_ownership(table_group); > + iommu_group_put(grp); > + } Sure, but please split the function, don't test on the platform->domain_type. Also, is there any chance someone can work on actually fixing this to be a proper iommu driver? I think that will become important for power to use the common dma_iommu code in the next year... Sort of like this: diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index ebe259bdd46298..0d6a7fea2bd9a5 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c @@ -1287,20 +1287,20 @@ spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain, struct iommu_domain *domain = iommu_get_domain_for_dev(dev); struct iommu_group *grp = iommu_group_get(dev); struct iommu_table_group *table_group; - int ret = -EINVAL; /* At first attach the ownership is already set */ if (!domain) return 0; - if (!grp) - return -ENODEV; - table_group = iommu_group_get_iommudata(grp); - ret = table_group->ops->take_ownership(table_group); + /* + * The domain being set to PLATFORM from earlier + * BLOCKED. The table_group ownership has to be released. + */ + table_group->ops->release_ownership(table_group); iommu_group_put(grp); - return ret; + return 0 } static const struct iommu_domain_ops spapr_tce_platform_domain_ops = { @@ -1312,13 +1312,33 @@ static struct iommu_domain spapr_tce_platform_domain = { .ops = &spapr_tce_platform_domain_ops, }; -static struct iommu_domain spapr_tce_blocked_domain = { - .type = IOMMU_DOMAIN_BLOCKED, +static int +spapr_tce_platform_iommu_blocked_dev(struct iommu_domain *platform_domain, + struct device *dev) +{ + struct iommu_domain *domain = iommu_get_domain_for_dev(dev); + struct iommu_group *grp = iommu_group_get(dev); + struct iommu_table_group *table_group; + int ret = -EINVAL; + /* * FIXME: SPAPR mixes blocked and platform behaviors, the blocked domain * also sets the dma_api ops */ - .ops = &spapr_tce_platform_domain_ops, + table_group = iommu_group_get_iommudata(grp); + ret = table_group->ops->take_ownership(table_group); + iommu_group_put(grp); + + return ret; +} + +static const struct iommu_domain_ops spapr_tce_blocked_domain_ops = { + .attach_dev = spapr_tce_blocked_iommu_attach_dev, +}; + +static struct iommu_domain spapr_tce_blocked_domain = { + .type = IOMMU_DOMAIN_BLOCKED, + .ops = &spapr_tce_blocked_domain_ops, }; static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)