From: Herve Codina <herve.codina@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
Mark Brown <broonie@kernel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 32/36] soc: fsl: qe: Add resource-managed muram allocators
Date: Thu, 8 Aug 2024 09:11:25 +0200 [thread overview]
Message-ID: <20240808071132.149251-33-herve.codina@bootlin.com> (raw)
In-Reply-To: <20240808071132.149251-1-herve.codina@bootlin.com>
Introduce devm_cpm_muram_alloc() and devm_cpm_muram_alloc_fixed(), the
resource-managed version of cpm_muram_alloc and cpm_muram_alloc_fixed().
These resource-managed versions simplify the user avoiding the need to
call cpm_muram_free(). Indeed, the allocated area returned by these
functions will be automatically freed on driver detach.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
drivers/soc/fsl/qe/qe_common.c | 80 ++++++++++++++++++++++++++++++++++
include/soc/fsl/qe/qe.h | 22 +++++++++-
2 files changed, 101 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qe/qe_common.c b/drivers/soc/fsl/qe/qe_common.c
index a877347d37d3..02c29f5f86d3 100644
--- a/drivers/soc/fsl/qe/qe_common.c
+++ b/drivers/soc/fsl/qe/qe_common.c
@@ -13,6 +13,7 @@
* 2006 (c) MontaVista Software, Inc.
* Vitaly Bordug <vbordug@ru.mvista.com>
*/
+#include <linux/device.h>
#include <linux/genalloc.h>
#include <linux/init.h>
#include <linux/list.h>
@@ -187,6 +188,49 @@ void cpm_muram_free(s32 offset)
}
EXPORT_SYMBOL(cpm_muram_free);
+static void devm_cpm_muram_release(struct device *dev, void *res)
+{
+ s32 *info = res;
+
+ cpm_muram_free(*info);
+}
+
+/**
+ * devm_cpm_muram_alloc - Resource-managed cpm_muram_alloc
+ * @dev: Device to allocate memory for
+ * @size: number of bytes to allocate
+ * @align: requested alignment, in bytes
+ *
+ * This function returns a non-negative offset into the muram area, or
+ * a negative errno on failure as cpm_muram_alloc() does.
+ * Use cpm_muram_addr() to get the virtual address of the area.
+ *
+ * Compare against cpm_muram_alloc(), the memory allocated by this
+ * resource-managed version is automatically freed on driver detach and so,
+ * cpm_muram_free() must not be called to release the allocated memory.
+ */
+s32 devm_cpm_muram_alloc(struct device *dev, unsigned long size,
+ unsigned long align)
+{
+ s32 info;
+ s32 *dr;
+
+ dr = devres_alloc(devm_cpm_muram_release, sizeof(*dr), GFP_KERNEL);
+ if (!dr)
+ return -ENOMEM;
+
+ info = cpm_muram_alloc(size, align);
+ if (info >= 0) {
+ *dr = info;
+ devres_add(dev, dr);
+ } else {
+ devres_free(dr);
+ }
+
+ return info;
+}
+EXPORT_SYMBOL(devm_cpm_muram_alloc);
+
/*
* cpm_muram_alloc_fixed - reserve a specific region of multi-user ram
* @offset: offset of allocation start address
@@ -211,6 +255,42 @@ s32 cpm_muram_alloc_fixed(unsigned long offset, unsigned long size)
}
EXPORT_SYMBOL(cpm_muram_alloc_fixed);
+/**
+ * devm_cpm_muram_alloc_fixed - Resource-managed cpm_muram_alloc_fixed
+ * @dev: Device to allocate memory for
+ * @offset: offset of allocation start address
+ * @size: number of bytes to allocate
+ *
+ * This function returns a non-negative offset into the muram area, or
+ * a negative errno on failure as cpm_muram_alloc_fixed() does.
+ * Use cpm_muram_addr() to get the virtual address of the area.
+ *
+ * Compare against cpm_muram_alloc_fixed(), the memory allocated by this
+ * resource-managed version is automatically freed on driver detach and so,
+ * cpm_muram_free() must not be called to release the allocated memory.
+ */
+s32 devm_cpm_muram_alloc_fixed(struct device *dev, unsigned long offset,
+ unsigned long size)
+{
+ s32 info;
+ s32 *dr;
+
+ dr = devres_alloc(devm_cpm_muram_release, sizeof(*dr), GFP_KERNEL);
+ if (!dr)
+ return -ENOMEM;
+
+ info = cpm_muram_alloc_fixed(offset, size);
+ if (info >= 0) {
+ *dr = info;
+ devres_add(dev, dr);
+ } else {
+ devres_free(dr);
+ }
+
+ return info;
+}
+EXPORT_SYMBOL(devm_cpm_muram_alloc_fixed);
+
/**
* cpm_muram_addr - turn a muram offset into a virtual address
* @offset: muram offset to convert
diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h
index af793f2a0ec4..629835b6c71d 100644
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -23,6 +23,8 @@
#include <linux/of_address.h>
#include <linux/types.h>
+struct device;
+
#define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */
#define QE_NUM_OF_BRGS 16
#define QE_NUM_OF_PORTS 1024
@@ -93,8 +95,12 @@ int cpm_muram_init(void);
#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
s32 cpm_muram_alloc(unsigned long size, unsigned long align);
+s32 devm_cpm_muram_alloc(struct device *dev, unsigned long size,
+ unsigned long align);
void cpm_muram_free(s32 offset);
s32 cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
+s32 devm_cpm_muram_alloc_fixed(struct device *dev, unsigned long offset,
+ unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(const void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
@@ -106,6 +112,12 @@ static inline s32 cpm_muram_alloc(unsigned long size,
return -ENOSYS;
}
+static inline s32 devm_cpm_muram_alloc(struct device *dev, unsigned long size,
+ unsigned long align)
+{
+ return -ENOSYS;
+}
+
static inline void cpm_muram_free(s32 offset)
{
}
@@ -116,6 +128,13 @@ static inline s32 cpm_muram_alloc_fixed(unsigned long offset,
return -ENOSYS;
}
+static inline s32 devm_cpm_muram_alloc_fixed(struct device *dev,
+ unsigned long offset,
+ unsigned long size)
+{
+ return -ENOSYS;
+}
+
static inline void __iomem *cpm_muram_addr(unsigned long offset)
{
return NULL;
@@ -172,7 +191,6 @@ static inline int par_io_data_set(u8 port, u8 pin, u8 val) { return -ENOSYS; }
/*
* Pin multiplexing functions.
*/
-struct device;
struct qe_pin;
#ifdef CONFIG_QE_GPIO
extern struct qe_pin *qe_pin_request(struct device *dev, int index);
@@ -233,7 +251,9 @@ static inline int qe_alive_during_sleep(void)
/* we actually use cpm_muram implementation, define this for convenience */
#define qe_muram_init cpm_muram_init
#define qe_muram_alloc cpm_muram_alloc
+#define devm_qe_muram_alloc devm_cpm_muram_alloc
#define qe_muram_alloc_fixed cpm_muram_alloc_fixed
+#define devm_qe_muram_alloc_fixed devm_cpm_muram_alloc_fixed
#define qe_muram_free cpm_muram_free
#define qe_muram_addr cpm_muram_addr
#define qe_muram_offset cpm_muram_offset
--
2.45.0
next prev parent reply other threads:[~2024-08-08 7:37 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-08 7:10 [PATCH v2 00/36] soc: fsl: Add support for QUICC Engine TSA and QMC Herve Codina
2024-08-08 7:10 ` [PATCH v2 01/36] soc: fsl: cpm1: qmc: Update TRNSYNC only in transparent mode Herve Codina
2024-08-23 8:03 ` Christophe Leroy
2024-08-08 7:10 ` [PATCH v2 02/36] soc: fsl: cpm1: qmc: Enable TRNSYNC only when needed Herve Codina
2024-08-23 8:03 ` Christophe Leroy
2024-08-08 7:10 ` [PATCH v2 03/36] soc: fsl: cpm1: tsa: Fix tsa_write8() Herve Codina
2024-08-23 8:04 ` Christophe Leroy
2024-08-08 7:10 ` [PATCH v2 04/36] soc: fsl: cpm1: tsa: Use BIT(), GENMASK() and FIELD_PREP() macros Herve Codina
2024-08-23 8:04 ` Christophe Leroy
2024-08-08 7:10 ` [PATCH v2 05/36] soc: fsl: cpm1: tsa: Fix blank line and spaces Herve Codina
2024-08-23 8:04 ` Christophe Leroy
2024-08-08 7:10 ` [PATCH v2 06/36] soc: fsl: cpm1: tsa: Add missing spinlock comment Herve Codina
2024-08-23 8:05 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 07/36] dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) TSA controller Herve Codina
2024-08-13 19:01 ` Rob Herring (Arm)
2024-08-23 8:05 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 08/36] soc: fsl: cpm1: tsa: Remove unused registers offset definition Herve Codina
2024-08-23 8:05 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 09/36] soc: fsl: cpm1: tsa: Use ARRAY_SIZE() instead of hardcoded integer values Herve Codina
2024-08-23 8:05 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 10/36] soc: fsl: cpm1: tsa: Make SIRAM entries specific to CPM1 Herve Codina
2024-08-23 8:06 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 11/36] soc: fsl: cpm1: tsa: Introduce tsa_setup() and its CPM1 compatible version Herve Codina
2024-08-23 8:06 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 12/36] soc: fsl: cpm1: tsa: Isolate specific CPM1 part from tsa_serial_{dis}connect() Herve Codina
2024-08-23 8:07 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 13/36] soc: fsl: cpm1: tsa: Introduce tsa_version Herve Codina
2024-08-23 8:08 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 14/36] soc: fsl: cpm1: tsa: Add support for QUICC Engine (QE) implementation Herve Codina
2024-08-23 8:08 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 15/36] MAINTAINERS: Add QE files related to the Freescale TSA controller Herve Codina
2024-08-23 8:08 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 16/36] soc: fsl: cpm1: tsa: Introduce tsa_serial_get_num() Herve Codina
2024-08-23 8:09 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 17/36] soc: fsl: cpm1: qmc: Rename QMC_TSA_MASK Herve Codina
2024-08-23 8:09 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 18/36] soc: fsl: cpm1: qmc: Use BIT(), GENMASK() and FIELD_PREP() macros Herve Codina
2024-08-23 8:07 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 19/36] soc: fsl: cpm1: qmc: Fix blank line and spaces Herve Codina
2024-08-23 8:07 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 20/36] soc: fsl: cpm1: qmc: Remove unneeded parenthesis Herve Codina
2024-08-23 8:09 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 21/36] soc: fsl: cpm1: qmc: Fix 'transmiter' typo Herve Codina
2024-08-23 8:10 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 22/36] soc: fsl: cpm1: qmc: Add missing spinlock comment Herve Codina
2024-08-23 8:10 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 23/36] dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) QMC controller Herve Codina
2024-08-13 19:12 ` Rob Herring
2024-08-23 8:11 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 24/36] soc: fsl: cpm1: qmc: Introduce qmc_data structure Herve Codina
2024-08-23 8:11 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 25/36] soc: fsl: cpm1: qmc: Re-order probe() operations Herve Codina
2024-08-23 8:11 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 26/36] soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version Herve Codina
2024-08-23 8:11 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 27/36] soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their " Herve Codina
2024-08-23 8:12 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 28/36] soc: fsl: cpm1: qmc: Rename qmc_chan_command() Herve Codina
2024-08-23 8:12 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 29/36] soc: fsl: cpm1: qmc: Handle RPACK initialization Herve Codina
2024-08-23 8:13 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 30/36] soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC Herve Codina
2024-08-23 8:13 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 31/36] soc: fsl: cpm1: qmc: Introduce qmc_version Herve Codina
2024-08-23 8:13 ` Christophe Leroy
2024-08-08 7:11 ` Herve Codina [this message]
2024-08-23 8:13 ` [PATCH v2 32/36] soc: fsl: qe: Add resource-managed muram allocators Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 33/36] soc: fsl: qe: Add missing PUSHSCHED command Herve Codina
2024-08-23 8:14 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 34/36] soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation Herve Codina
2024-08-23 8:14 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 35/36] soc: fsl: cpm1: qmc: Handle QUICC Engine (QE) soft-qmc firmware Herve Codina
2024-08-23 8:14 ` Christophe Leroy
2024-08-08 7:11 ` [PATCH v2 36/36] MAINTAINERS: Add QE files related to the Freescale QMC controller Herve Codina
2024-08-23 8:15 ` Christophe Leroy
2024-09-03 8:44 ` [PATCH v2 00/36] soc: fsl: Add support for QUICC Engine TSA and QMC Christophe Leroy
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