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Fri, 23 Aug 2024 14:45:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724424340; bh=W6z8CSJIQISlh38AzR3KbpPdvjf84h6oaEwrIWjYySE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=sZqjTOS2yJ3SZLJsVGt+kPr01XngWDjZhXRB11P59QKeuj0yVdJ2sI1jiTOtfwc1l 0KofF0+gZW+2ilrX698/xbyYRzb0afe9ZQFHS1eX/89s0tT+SeZqTHYfl0x18Zexz+ ojJmzjO42Pp6SJ9/97BgEuwauVrtWeqDuXAITbu5HlICS/eRA8zhCqnIg8SX7Th28A y7taxVji40p7C4F97d5UAN7RkOd33c6kp1ratVeJjgaBBAfyebkKljPHUnl0HXwW3X 1mwWo5iqo+efoKR6XMU/0Rs+9uXSAMETOVivGRw42b48YIgSaoiHjeAEww/ehNsqRy s82ANrYxvLTLA== Date: Fri, 23 Aug 2024 15:45:32 +0100 From: Will Deacon To: Joey Gouly Cc: linux-arm-kernel@lists.infradead.org, nd@arm.com, akpm@linux-foundation.org, aneesh.kumar@kernel.org, aneesh.kumar@linux.ibm.com, anshuman.khandual@arm.com, bp@alien8.de, broonie@kernel.org, catalin.marinas@arm.com, christophe.leroy@csgroup.eu, dave.hansen@linux.intel.com, hpa@zytor.com, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, maz@kernel.org, mingo@redhat.com, mpe@ellerman.id.au, naveen.n.rao@linux.ibm.com, npiggin@gmail.com, oliver.upton@linux.dev, shuah@kernel.org, skhan@linuxfoundation.org, szabolcs.nagy@arm.com, tglx@linutronix.de, x86@kernel.org, kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org Subject: Re: [PATCH v5 06/30] arm64: context switch POR_EL0 register Message-ID: <20240823144531.GH32156@willie-the-truck> References: <20240822151113.1479789-1-joey.gouly@arm.com> <20240822151113.1479789-7-joey.gouly@arm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Post: List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240822151113.1479789-7-joey.gouly@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) On Thu, Aug 22, 2024 at 04:10:49PM +0100, Joey Gouly wrote: > POR_EL0 is a register that can be modified by userspace directly, > so it must be context switched. > > Signed-off-by: Joey Gouly > Cc: Catalin Marinas > Cc: Will Deacon > Reviewed-by: Catalin Marinas > --- > arch/arm64/include/asm/cpufeature.h | 6 ++++++ > arch/arm64/include/asm/processor.h | 1 + > arch/arm64/include/asm/sysreg.h | 3 +++ > arch/arm64/kernel/process.c | 28 ++++++++++++++++++++++++++++ > 4 files changed, 38 insertions(+) [...] > +static void permission_overlay_switch(struct task_struct *next) > +{ > + if (!system_supports_poe()) > + return; > + > + current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); > + if (current->thread.por_el0 != next->thread.por_el0) { > + write_sysreg_s(next->thread.por_el0, SYS_POR_EL0); > + /* ISB required for kernel uaccess routines when chaning POR_EL0 */ nit: typo "chaning". But more substantially, is this just to prevent spurious faults in the context of a new thread using a stale value for POR_EL0? Will