From: Rob Herring <robh@kernel.org>
To: "J. Neuschäfer" <j.ne@posteo.net>
Cc: devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
"Scott Wood" <oss@buserror.net>,
"Madhavan Srinivasan" <maddy@linux.ibm.com>,
"Michael Ellerman" <mpe@ellerman.id.au>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Christophe Leroy" <christophe.leroy@csgroup.eu>,
"Naveen N Rao" <naveen@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Niklas Cassel" <cassel@kernel.org>,
"Herbert Xu" <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
"Lee Jones" <lee@kernel.org>, "Vinod Koul" <vkoul@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"J. Neuschäfer" <j.neuschaefer@gmx.net>,
"Wim Van Sebroeck" <wim@linux-watchdog.org>,
"Guenter Roeck" <linux@roeck-us.net>,
"Mark Brown" <broonie@kernel.org>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Richard Weinberger" <richard@nod.at>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org,
linux-pci@vger.kernel.org, linux-watchdog@vger.kernel.org,
linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org
Subject: Re: [PATCH 8/9] dt-bindings: spi: Convert Freescale SPI bindings to YAML
Date: Sun, 26 Jan 2025 23:09:01 -0600 [thread overview]
Message-ID: <20250127050901.GB3127337-robh@kernel.org> (raw)
In-Reply-To: <20250126-ppcyaml-v1-8-50649f51c3dd@posteo.net>
On Sun, Jan 26, 2025 at 07:59:03PM +0100, J. Neuschäfer wrote:
> fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
> contollers. Convert them to YAML.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
> .../devicetree/bindings/spi/fsl,espi.yaml | 56 +++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl,spi.yaml | 71 ++++++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 -------------------
> 3 files changed, 127 insertions(+), 62 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..350275760210c5763af0c7b1e1522ccbfb97eec7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,mpc8536-espi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts: true
How many?
> +
> + fsl,espi-num-chipselects:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The number of the chipselect signals.
Constraints?
> +
> + fsl,csbef:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Chip select assertion time in bits before frame starts
Constraints?
> +
> + fsl,csaft:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Chip select negation time in bits after frame ends
Constraints?
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - fsl,espi-num-chipselects
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@110000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,mpc8536-espi";
> + reg = <0x110000 0x1000>;
> + interrupts = <53 0x2>;
> + interrupt-parent = <&mpic>;
> + fsl,espi-num-chipselects = <4>;
> + fsl,csbef = <1>;
> + fsl,csaft = <1>;
> + };
> diff --git a/Documentation/devicetree/bindings/spi/fsl,spi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..8efa971b5954a93665cb624345774f2966bb5648
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
> @@ -0,0 +1,71 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,spi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SPI (Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,spi
> + - aeroflexgaisler,spictrl
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + QE SPI subblock index.
> + 0: QE subblock SPI1
> + 1: QE subblock SPI2
> +
> + mode:
> + description: SPI operation mode
> + enum:
> + - cpu
> + - cpu-qe
> +
> + interrupts: true
> +
> + clock-frequency:
> + $ref: /schemas/types.yaml#/definitions/uint32
Don't need a type.
> + description: input clock frequency to non FSL_SOC cores
> +
> + cs-gpios: true
> +
> + fsl,spisel_boot:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used
> + as chip select for a slave device. Use reg = <number of gpios> in the
> + corresponding child node, i.e. 0 if the cs-gpios property is not present.
> +
> +required:
> + - compatible
> + - reg
> + - mode
> + - interrupts
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@4c0 {
> + cell-index = <0>;
> + compatible = "fsl,spi";
> + reg = <0x4c0 0x40>;
> + interrupts = <82 0>;
> + interrupt-parent = <&intc>;
> + mode = "cpu";
> + cs-gpios = <&gpio 18 1 // device reg=<0>
> + &gpio 19 1>; // device reg=<1>
> + };
next prev parent reply other threads:[~2025-01-27 5:09 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-26 18:58 [PATCH 0/9] YAML conversion of several Freescale/PowerPC DT bindings J. Neuschäfer via B4 Relay
2025-01-26 18:58 ` [PATCH 1/9] dt-bindings: powerpc: Add binding for Freescale/NXP MPC83xx SoCs J. Neuschäfer via B4 Relay
2025-01-27 4:23 ` Rob Herring (Arm)
2025-01-26 18:58 ` [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML J. Neuschäfer via B4 Relay
2025-01-26 23:22 ` Damien Le Moal
2025-01-31 12:23 ` J. Neuschäfer
2025-01-27 4:37 ` Rob Herring
2025-01-26 18:58 ` [PATCH 3/9] dt-bindings: crypto: Convert fsl,sec-2.0 " J. Neuschäfer via B4 Relay
2025-01-27 4:41 ` Rob Herring
2025-01-29 15:41 ` J. Neuschäfer
2025-01-26 18:58 ` [PATCH 4/9] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx " J. Neuschäfer via B4 Relay
2025-01-27 4:42 ` Rob Herring
2025-02-11 14:13 ` (subset) " Lee Jones
2025-01-26 18:59 ` [PATCH 5/9] dt-bindings: dma: Convert fsl,elo*-dma bindings " J. Neuschäfer via B4 Relay
2025-01-27 4:47 ` Rob Herring
2025-01-31 14:03 ` J. Neuschäfer
2025-01-31 22:16 ` Rob Herring
2025-02-04 18:19 ` J. Neuschäfer
2025-01-29 22:52 ` Frank Li
2025-02-04 21:47 ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH 6/9] dt-bindings: pci: Add fsl,mpc83xx-pcie bindings J. Neuschäfer via B4 Relay
2025-01-27 4:50 ` Rob Herring
2025-02-04 23:31 ` J. Neuschäfer
2025-01-29 22:55 ` Frank Li
2025-02-04 23:34 ` J. Neuschäfer
2025-02-06 12:42 ` Mukesh Kumar Savaliya
2025-02-07 13:37 ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH 7/9] dt-bindings: watchdog: Convert mpc8xxx-wdt binding to YAML J. Neuschäfer via B4 Relay
2025-01-27 4:51 ` Rob Herring
2025-01-26 18:59 ` [PATCH 8/9] dt-bindings: spi: Convert Freescale SPI bindings " J. Neuschäfer via B4 Relay
2025-01-27 5:09 ` Rob Herring [this message]
2025-02-05 14:29 ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH RFC 9/9] dt-bindings: nand: Convert fsl,elbc " J. Neuschäfer via B4 Relay
2025-01-27 4:23 ` Rob Herring
2025-02-06 22:59 ` J. Neuschäfer
2025-01-27 8:37 ` Krzysztof Kozlowski
2025-02-06 22:30 ` J. Neuschäfer
2025-01-29 23:01 ` Frank Li
2025-02-06 22:59 ` J. Neuschäfer
2025-01-29 22:29 ` [PATCH 0/9] YAML conversion of several Freescale/PowerPC DT bindings Frank Li
2025-01-31 11:33 ` J. Neuschäfer
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