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Rozycki" , Thomas Bogendoerfer , Ilpo =?utf-8?B?SsOkcnZpbmVu?= , Guenter Roeck , Christian Zigotzky , FUKAUMI Naoki , Herve Codina , Diederik de Haas , Dragan Simic , Johan Hovold , linuxppc-dev@lists.ozlabs.org, linux-rockchip@lists.infradead.org, linux-mips@vger.kernel.org Subject: [GIT PULL] PCI fixes for v6.18 Message-ID: <20251024192903.GA1360890@bhelgaas> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787: Linux 6.18-rc1 (2025-10-12 13:42:36 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git tags/pci-v6.18-fixes-3 for you to fetch changes up to df5192d9bb0e38bf831fb93e8026e346aa017ca8: PCI/ASPM: Enable only L0s and L1 for devicetree platforms (2025-10-23 20:08:14 -0500) ---------------------------------------------------------------- - Add DWC custom pci_ops for the root bus instead of overwriting the DBI base address, which broke drivers that rely on the DBI address for iATU programming; fixes an FU740 probe regression (Krishna Chaitanya Chundru) - Revert qcom ECAM enablement, which is rendered unnecessary by the DWC custom pci_ops (Krishna Chaitanya Chundru) - Fix longstanding MIPS Malta resource registration issues to avoid exposing them when the next commit fixes the boot failure (Maciej W. Rozycki) - Use pcibios_align_resource() on MIPS Malta to fix boot failure caused by using the generic pci_enable_resources() (Ilpo Järvinen) - Enable only ASPM L0s and L1, not L1 PM Substates, for devicetree platforms because we lack information required to configure L1 Substates; fixes regressions on powerpc and rockchip. A qcom regression (L1 Substates no longer enabled) remains and will be addressed next (Bjorn Helgaas) ---------------------------------------------------------------- Bjorn Helgaas (1): PCI/ASPM: Enable only L0s and L1 for devicetree platforms Ilpo Järvinen (1): MIPS: Malta: Use pcibios_align_resource() to block io range Krishna Chaitanya Chundru (2): PCI: dwc: Use custom pci_ops for root bus DBI vs ECAM config access Revert "PCI: qcom: Prepare for the DWC ECAM enablement" Maciej W. Rozycki (2): MIPS: Malta: Fix keyboard resource preventing i8042 driver from registering MIPS: Malta: Fix PCI southbridge legacy resource reservations arch/mips/mti-malta/malta-setup.c | 4 +- arch/mips/pci/pci-malta.c | 3 +- drivers/pci/controller/dwc/pcie-designware-host.c | 28 ++++++++-- drivers/pci/controller/dwc/pcie-qcom.c | 68 ----------------------- drivers/pci/pcie/aspm.c | 34 +++--------- 5 files changed, 36 insertions(+), 101 deletions(-)