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From: Bjorn Helgaas <helgaas@kernel.org>
To: linux-pci@vger.kernel.org
Cc: Christian Zigotzky <chzigotzky@xenosoft.de>,
	Manivannan Sadhasivam <mani@kernel.org>,
	mad skateman <madskateman@gmail.com>,
	"R . T . Dickinson" <rtd2@xtra.co.nz>,
	Darren Stevens <darren@stevens-zone.net>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	Lukas Wunner <lukas@wunner.de>,
	luigi burdo <intermediadc@hotmail.com>, Al <al@datazap.net>,
	Roland <rol7and@gmx.com>, Hongxing Zhu <hongxing.zhu@nxp.com>,
	hypexed@yahoo.com.au, linuxppc-dev@lists.ozlabs.org,
	debian-powerpc@lists.debian.org, linux-kernel@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: [PATCH v2 4/4] PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports
Date: Mon, 10 Nov 2025 16:22:28 -0600	[thread overview]
Message-ID: <20251110222929.2140564-5-helgaas@kernel.org> (raw)
In-Reply-To: <20251110222929.2140564-1-helgaas@kernel.org>

From: Bjorn Helgaas <bhelgaas@google.com>

Christian reported that f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and
ASPM states for devicetree platforms") broke booting on the A-EON X5000.

Override the L0s and L1 Support advertised in Link Capabilities by the
X5000 Root Ports ([1957:0451]) so we don't try to enable those states.

Fixes: f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for devicetree platforms")
Fixes: df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms")
Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Link: https://lore.kernel.org/r/db5c95a1-cf3e-46f9-8045-a1b04908051a@xenosoft.de
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/quirks.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 922c77c627a1..b94264cd3833 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2523,6 +2523,7 @@ static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev)
  * disable both L0s and L1 for now to be safe.
  */
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ASMEDIA, 0x1080, quirk_disable_aspm_l0s_l1);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, 0x0451, quirk_disable_aspm_l0s_l1);
 
 /*
  * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain
-- 
2.43.0



  parent reply	other threads:[~2025-11-10 22:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-10 22:22 [PATCH v2 0/4] PCI/ASPM: Allow quirks to avoid L0s and L1 Bjorn Helgaas
2025-11-10 22:22 ` [PATCH v2 1/4] PCI/ASPM: Cache L0s/L1 Supported so advertised link states can be overridden Bjorn Helgaas
2025-11-10 22:22 ` [PATCH v2 2/4] PCI/ASPM: Add pcie_aspm_remove_cap() to override advertised link states Bjorn Helgaas
2025-11-12 17:27   ` Manivannan Sadhasivam
2025-11-12 20:46     ` Bjorn Helgaas
2025-11-13  4:02       ` Maciej W. Rozycki
2025-11-10 22:22 ` [PATCH v2 3/4] PCI/ASPM: Convert quirks " Bjorn Helgaas
2025-11-10 22:22 ` Bjorn Helgaas [this message]
2025-11-11  1:33 ` [PATCH v2 0/4] PCI/ASPM: Allow quirks to avoid L0s and L1 Shawn Lin
2025-11-11  9:33 ` Lukas Wunner
2025-11-11 15:44   ` Bjorn Helgaas
2025-11-12 14:40     ` Lukas Wunner
2025-11-11 17:11 ` Bjorn Helgaas

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