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Signed-off-by: Bartosz Golaszewski --- drivers/i2c/busses/i2c-isch.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index a2ac992f9cb0d2accfaa979b802b98c3b7fbe3af..6ff07ab12e30db6821cadea4de3a588b9023ea20 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -86,7 +86,7 @@ static int sch_transaction(struct i2c_adapter *adap) int temp; int rc; - dev_dbg(&adap->dev, + i2c_dbg(adap, "Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), sch_io_rd8(priv, SMBHSTADD), @@ -97,13 +97,13 @@ static int sch_transaction(struct i2c_adapter *adap) if (temp) { /* Can not be busy since we checked it in sch_access */ if (temp & 0x01) - dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); + i2c_dbg(adap, "Completion (%02x). Clear...\n", temp); if (temp & 0x06) - dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); + i2c_dbg(adap, "SMBus error (%02x). Resetting...\n", temp); sch_io_wr8(priv, SMBHSTSTS, temp); temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp) { - dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); + i2c_err(adap, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; } } @@ -116,28 +116,28 @@ static int sch_transaction(struct i2c_adapter *adap) rc = read_poll_timeout(sch_io_rd8, temp, !(temp & 0x08), 200, 500000, true, priv, SMBHSTSTS); /* If the SMBus is still busy, we give up */ if (rc) { - dev_err(&adap->dev, "SMBus Timeout!\n"); + i2c_err(adap, "SMBus Timeout!\n"); } else if (temp & 0x04) { rc = -EIO; - dev_dbg(&adap->dev, "Bus collision! SMBus may be locked until next hard reset. (sorry!)\n"); + i2c_dbg(adap, "Bus collision! SMBus may be locked until next hard reset. (sorry!)\n"); /* Clock stops and target is stuck in mid-transmission */ } else if (temp & 0x02) { rc = -EIO; - dev_err(&adap->dev, "Error: no response!\n"); + i2c_err(adap, "Error: no response!\n"); } else if (temp & 0x01) { - dev_dbg(&adap->dev, "Post complete!\n"); + i2c_dbg(adap, "Post complete!\n"); sch_io_wr8(priv, SMBHSTSTS, temp & 0x0f); temp = sch_io_rd8(priv, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ - dev_dbg(&adap->dev, + i2c_dbg(adap, "Failed reset at end of transaction (%02x), Bus error!\n", temp); } } else { rc = -ENXIO; - dev_dbg(&adap->dev, "No such address.\n"); + i2c_dbg(adap, "No such address.\n"); } - dev_dbg(&adap->dev, "Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", + i2c_dbg(adap, "Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), sch_io_rd8(priv, SMBHSTADD), sch_io_rd8(priv, SMBHSTDAT0), sch_io_rd8(priv, SMBHSTDAT1)); @@ -166,7 +166,7 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, /* Make sure the SMBus host is not busy */ temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp & 0x08) { - dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); + i2c_dbg(adap, "SMBus busy (%02x)\n", temp); return -EAGAIN; } temp = sch_io_rd16(priv, SMBHSTCLK); @@ -177,11 +177,11 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, * 100 kHz. If we actually run at 25 MHz the bus will be * run ~75 kHz instead which should do no harm. */ - dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"); + i2c_notice(adap, "Clock divider uninitialized. Setting defaults\n"); sch_io_wr16(priv, SMBHSTCLK, backbone_speed / (4 * 100)); } - dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_write)); + i2c_dbg(adap, "access size: %d %s\n", size, str_read_write(read_write)); switch (size) { case I2C_SMBUS_QUICK: sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); @@ -223,10 +223,10 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, size = SCH_BLOCK_DATA; break; default: - dev_warn(&adap->dev, "Unsupported transaction %d\n", size); + i2c_warn(adap, "Unsupported transaction %d\n", size); return -EOPNOTSUPP; } - dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); + i2c_dbg(adap, "write size %d to 0x%04x\n", size, SMBHSTCNT); temp = sch_io_rd8(priv, SMBHSTCNT); temp = (temp & 0xb0) | (size & 0x7); -- 2.47.3