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Tue, 16 Jun 2026 13:38:01 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (smtpav01.fra02v.mail.ibm.com [10.20.54.100]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 65GDbvC813042050 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 16 Jun 2026 13:37:57 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C2EE520043; Tue, 16 Jun 2026 13:37:57 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 050F220040; Tue, 16 Jun 2026 13:37:55 +0000 (GMT) Received: from fedora (unknown [9.5.7.39]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTPS; Tue, 16 Jun 2026 13:37:54 +0000 (GMT) Date: Tue, 16 Jun 2026 19:07:55 +0530 From: Amit Machhiwal To: Ritesh Harjani Cc: Amit Machhiwal , linuxppc-dev@lists.ozlabs.org, Madhavan Srinivasan , Vaibhav Jain , Harsh Prateek Bora , Anushree Mathur , Gautam Menghani , Mukesh Kumar Chaurasiya , Nicholas Piggin , Michael Ellerman , "Christophe Leroy (CS GROUP)" , Thomas Huth , kvm@vger.kernel.org, stable@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] KVM: PPC: Book3S HV: Validate arch_compat against host compatibility mode Message-ID: <20260616190601.49193107-d8-amachhiw@linux.ibm.com> Mail-Followup-To: Ritesh Harjani , linuxppc-dev@lists.ozlabs.org, Madhavan Srinivasan , Vaibhav Jain , Harsh Prateek Bora , Anushree Mathur , Gautam Menghani , Mukesh Kumar Chaurasiya , Nicholas Piggin , Michael Ellerman , "Christophe Leroy (CS GROUP)" , Thomas Huth , kvm@vger.kernel.org, stable@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260609053327.61563-1-amachhiw@linux.ibm.com> <20260616161011.835c90f0-38-amachhiw@linux.ibm.com> <20260616182627.2ebf3cfc-3a-amachhiw@linux.ibm.com> <8q8eeio8.ritesh.list@gmail.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8q8eeio8.ritesh.list@gmail.com> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE2MDEzNSBTYWx0ZWRfXwLYiwAAZ/0qP C4fGeY/69Q52L5ztLq7fK62M/koQTcP7rGqF0dcW5PdQJIVqmG25U6Butopsqhyz0hWV9rQ+X2Q kZnO3iR09Fi6wc+Z3l3m+3eJ85OKFS0= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE2MDEzNSBTYWx0ZWRfX2aa9naN/h4n/ uZGa/jNJHCKe9M0iG+BKTBaVDqhwW5VeWwinEuRAcyAQzZ9YPyC8D8yUD3TnUTwZmOkTD3wdPFS KC/8MWStWvd7Yd28iAb2bRlU6va6qFm3zD9Ahtr23Act6pSxn3pq8YFgLBg52n5fk7ksPmM/b0m pEJ9gMzK9jmxgqhGtiKTLYHS1y/rOSb/gOmSl8IdmVJE7ULglbSX0J4PB9OqiqV6F+uBgUgmqHW FyHeTUnE+oLlUPDvFk1DwvMNW1xYT0tO4GbaGQ4w8b9ndzhzRJkQIZThvWbL9zYNmoaz1M7nA+M GL5vAS6jPizSqyu/nXaKDKhOFGWnVskpd14SWXXKRdNEcRC6nNSaHM4KwQcGp/49xWxhthSOpWa 7EZid1rkJfI/JOGNZT2f1Ceyl/OTWwUiip+rXSUrO/AHDdL2RNd6KeAe7cObRJ+hHttixnRQbXz 4p+Ao2j6zgWEeT8KE4g== X-Proofpoint-GUID: iK_GhqM-0CA3-a8u0l2MimtfPdu62Gqd X-Authority-Analysis: v=2.4 cv=NuDhtcdJ c=1 sm=1 tr=0 ts=6a3151ba cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=kj9zAlcOel0A:10 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=V8glGbnc2Ofi9Qvn3v5h:22 a=VnNF1IyMAAAA:8 a=iq54L-VbdJhnno5R1iwA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-ORIG-GUID: 3woL183bwpqlqcMfJLp47KJDbDowNofT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-16_03,2026-06-15_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 suspectscore=0 impostorscore=0 clxscore=1015 phishscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606160135 On 2026/06/16 06:39 PM, Ritesh Harjani wrote: > Amit Machhiwal writes: > > > On 2026/06/16 05:38 PM, Ritesh Harjani wrote: > >> Amit Machhiwal writes: > >> > >> >> > diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > >> >> > index 3449dd2b577d..7472b9522f71 100644 > >> >> > --- a/arch/powerpc/include/asm/reg.h > >> >> > +++ b/arch/powerpc/include/asm/reg.h > >> >> > @@ -1356,6 +1356,7 @@ > >> >> > #define PVR_ARCH_300 0x0f000005 > >> >> > #define PVR_ARCH_31 0x0f000006 > >> >> > #define PVR_ARCH_31_P11 0x0f000007 > >> >> > +#define PVR_ARCH_INVALID 0xffffffff > >> >> > >> >> Logical processor version is defined as part of the PAPR spec. We should > >> >> ensure that this invalid PVR is also documented in the PAPR spec. > >> >> > >> >> If you have already taken care of that, then please confirm and feel free to add: > >> > > >> > Regarding the PAPR specification documentation: The PAPR spec documents > >> > the valid Processor Version Register (PVR) values for each processor > >> > generation (POWER8, POWER9, POWER10, POWER11, etc.). However, the > >> > PVR_ARCH_INVALID value (0xffffffff) introduced in this patch series is a > >> > KVM implementation detail used internally to mark invalid compatibility > >> > mode requests - it's not an architectural value that would be defined in > >> > PAPR itself. > >> > > >> > The validation logic and the use of PVR_ARCH_INVALID as a sentinel value > >> > are documented in the kernel code and commit message. > >> > > >> > >> But that still worries me on what if PAPR wants to re-use this value for > >> some other purpose in future. > > > > This is a valid concern about potential future conflicts with PAPR. > > However, I'd like to point out that PAPR explicitly specifies: > > > > "The first byte of the logical processor version value shall be 0x0F." > > > > Since PVR_ARCH_INVALID (0xffffffff) has a first byte of 0xFF, it's > > explicitly outside the valid PAPR-defined range for logical PVR values. > > This means there shouldn't be any risk of future conflict with PAPR > > specifications. > > > > aah ok.. That make sense. Thanks for confirming that. > Can we please update a small comment in the code and log this info, > maybe something like: Sure, Ritesh. I can certainly do that in the next version. Thanks, Amit. > > /* > * PAPR specifies that the first byte of a valid logical PVR value is > * 0x0f. 0xffffffff therefore lies permanently outside the PAPR-defined > * range and is safe to repurpose as a kernel-internal sentinel. KVM > * stores it in vc->arch_compat when userspace requests an unsupported > * compatibility mode (e.g. Power11 on a Power10 compat host); > * kvmppc_sanity_check() detects this and prevents the vCPU from running > * until a valid arch_compat is set. > */ > #define PVR_ARCH_INVALID 0xffffffff > > > -ritesh >