From: bterrell <bterrell@empirix.com>
To: linuxppc-dev@ozlabs.org
Subject: Re: MPC8572 - IPR Register
Date: Wed, 17 Dec 2008 10:41:57 -0800 (PST) [thread overview]
Message-ID: <21058850.post@talk.nabble.com> (raw)
In-Reply-To: <40363DF0-BC55-4872-AF73-1ED0B24F6224@kernel.crashing.org>
On Dec 16, 2008, at 4:08 PM, bterrell wrote:
>
>
> Kumar Gala-3 wrote:
>>
>>
>> <1. Which PCIe port is the device on?
>> 2. is this a INT-X style or MSI interrupt?
>> 3. if INT-X is INT-A, B, C, D?
1. Non-transparent bridge device is on port 1 of the PLX8616 switch, which
is connected to first PCIE controller.
2. Using INTx style interrupts.
3. NT device asserts INTA, but this is swizzled by the upstream port of the
switch to be INTB before sending to 8572.
The problem also occurs when a hot-reset is sent inband from the PCIE
controller on 8572. I see the following differences in 8572 PCIE registers
in configuration space before/after the "hot reset" is sent:
PEX Config Space Register 0x414: before 0x00000000 after 0x000000001 <==
undocumented reg??
PEX Config Space Register 0x43C: before 0x00C2DC76 after 0x00013014 <==
undocumented reg??
PEX Config Space Register 0x4E8: before 0x00004D4D after 0x00000101 <==
undocumented reg??
Any idea what these registers are?
thanks,
Bill Terrell
Empirix, Inc.
--
View this message in context: http://www.nabble.com/MPC8572---IPR-Register-tp21040440p21058850.html
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prev parent reply other threads:[~2008-12-17 18:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <mailman.2123.1229452170.29923.linuxppc-dev@ozlabs.org>
2008-12-16 19:54 ` MPC8572 - IPR Register Morrison, Tom
2008-12-16 21:34 ` Kumar Gala
2008-12-16 22:08 ` bterrell
2008-12-16 23:00 ` Kumar Gala
2008-12-17 18:41 ` bterrell [this message]
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