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From: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: linux-cxl@vger.kernel.org,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Len Brown" <lenb@kernel.org>, "Tony Luck" <tony.luck@intel.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Hanjun Guo" <guohanjun@huawei.com>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Shuai Xue" <xueshuai@linux.alibaba.com>,
	"Davidlohr Bueso" <dave@stgolabs.net>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Alison Schofield" <alison.schofield@intel.com>,
	"Vishal Verma" <vishal.l.verma@intel.com>,
	"Ira Weiny" <ira.weiny@intel.com>,
	"Dan Williams" <dan.j.williams@intel.com>,
	"Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
	"Oliver O'Halloran" <oohall@gmail.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Xiaofei Tan" <tanxiaofei@huawei.com>,
	"Mario Limonciello" <mario.limonciello@amd.com>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Heinrich Schuchardt" <heinrich.schuchardt@canonical.com>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Ingo Molnar" <mingo@kernel.org>,
	"Guo Weikang" <guoweikang.kernel@gmail.com>,
	"Xin Li" <xin@zytor.com>, "Will Deacon" <will@kernel.org>,
	"Huang Yiwei" <quic_hyiwei@quicinc.com>,
	"Gavin Shan" <gshan@redhat.com>,
	"Smita Koralahalli" <Smita.KoralahalliChannabasappa@amd.com>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
	"Li Ming" <ming.li@zohomail.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Kuppuswamy Sathyanarayanan"
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	"Karolina Stolarek" <karolina.stolarek@oracle.com>,
	"Jon Pan-Doh" <pandoh@google.com>,
	"Lukas Wunner" <lukas@wunner.de>,
	"Shiju Jose" <shiju.jose@huawei.com>,
	linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 2/6 v6] ACPI: extlog: Trace CPER PCI Express Error Section
Date: Fri, 31 Oct 2025 11:18:27 +0100	[thread overview]
Message-ID: <2351924.vFx2qVVIhK@fdefranc-mobl3> (raw)
In-Reply-To: <20251028144816.000018a3@huawei.com>

On Tuesday, October 28, 2025 3:48:16 PM Central European Standard Time Jonathan Cameron wrote:
> On Thu, 23 Oct 2025 14:25:37 +0200
> "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com> wrote:
> 
> > I/O Machine Check Architecture events may signal failing PCIe components
> > or links. The AER event contains details on what was happening on the wire
> > when the error was signaled.
> > 
> > Trace the CPER PCIe Error section (UEFI v2.10, Appendix N.2.7) reported
> > by the I/O MCA.
> > 
> > Cc: Dan Williams <dan.j.williams@intel.com>
> > Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> > Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> > Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
> Hi Fabio,
> 
> Was taking a fresh look at this as a precursor to looking at later
> patches in series and spotted something that I'm doubtful about.
> 
> > diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
> > index 47d11cb5c912..cefe8d2d8aff 100644
> > --- a/drivers/acpi/acpi_extlog.c
> > +++ b/drivers/acpi/acpi_extlog.c
> > @@ -132,6 +132,34 @@ static int print_extlog_rcd(const char *pfx,
> >  	return 1;
> >  }
> >  
> > +static void extlog_print_pcie(struct cper_sec_pcie *pcie_err,
> > +			      int severity)
> > +{
> > +	struct aer_capability_regs *aer;
> > +	struct pci_dev *pdev;
> > +	unsigned int devfn;
> > +	unsigned int bus;
> > +	int aer_severity;
> > +	int domain;
> > +
> > +	if (!(pcie_err->validation_bits & CPER_PCIE_VALID_DEVICE_ID ||
> > +	      pcie_err->validation_bits & CPER_PCIE_VALID_AER_INFO))
> 
> Looking again, I'm not sure this is as intended.  Is the aim to
> allow for either one of these two?  Or check that that are both present? 
> That is should it be !(A && B) rather than !(A || B)?
> 
Hi Jonathan,

You're right. We need to check that both are true and return if they are 
not, then the statement has to be !(A && B).

Thank you,

Fabio 
> 
> > +		return;
> > +
> > +	aer_severity = cper_severity_to_aer(severity);
> > +	aer = (struct aer_capability_regs *)pcie_err->aer_info;
> > +	domain = pcie_err->device_id.segment;
> > +	bus = pcie_err->device_id.bus;
> > +	devfn = PCI_DEVFN(pcie_err->device_id.device,
> > +			  pcie_err->device_id.function);
> > +	pdev = pci_get_domain_bus_and_slot(domain, bus, devfn);
> > +	if (!pdev)
> > +		return;
> > +
> > +	pci_print_aer(pdev, aer_severity, aer);
> > +	pci_dev_put(pdev);
> > +}
> 
> 






  reply	other threads:[~2025-10-31 10:18 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-23 12:25 [PATCH 0/6 v6] Make ELOG and GHES log and trace consistently Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 1/6 v6] ACPI: extlog: Trace CPER Non-standard Section Body Fabio M. De Francesco
2025-10-28 16:19   ` Kuppuswamy Sathyanarayanan
2025-10-23 12:25 ` [PATCH 2/6 v6] ACPI: extlog: Trace CPER PCI Express Error Section Fabio M. De Francesco
2025-10-28 14:48   ` Jonathan Cameron
2025-10-31 10:18     ` Fabio M. De Francesco [this message]
2025-10-23 12:25 ` [PATCH 3/6 v6] acpi/ghes: Make GHES select ACPI_APEI_PCIEAER Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 4/6 v6] acpi/ghes: Add helper for CXL protocol errors checks Fabio M. De Francesco
2025-10-28 14:54   ` Jonathan Cameron
2025-11-04 17:41     ` Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 5/6 v6] acpi/ghes: Add helper to copy CXL protocol error info to work struct Fabio M. De Francesco
2025-10-28 14:59   ` Jonathan Cameron
2025-10-23 12:25 ` [PATCH 6/6 v6] ACPI: extlog: Trace CPER CXL Protocol Error Section Fabio M. De Francesco
2025-10-28 15:06   ` Jonathan Cameron
2025-11-04 16:53     ` Fabio M. De Francesco
2025-10-27 19:40 ` [PATCH 0/6 v6] Make ELOG and GHES log and trace consistently Rafael J. Wysocki
2025-10-27 20:15   ` Luck, Tony

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