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From: Segher Boessenkool <segher@kernel.crashing.org>
Subject: Re: [PATCH 2/2] [POWERPC] Add L2 cache node to AMCC Taishan dts file
Date: Tue, 18 Mar 2008 23:40:47 +0100
To: Stefan Roese <sr@denx.de>
Cc: linuxppc-dev@ozlabs.org
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> +	L2C0: l2c@30 {
> +		compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
> +		dcr-reg = <20 8			/* Internal SRAM DCR's */
> +			   30 8>;		/* L2 cache DCR's */

The unit address is based on the _first_ entry in "reg".  No2 this
is "dcr-reg", but you don't really want to be more incompatible than
necessary...


Segher