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Subject: Re: [PATCH 2/3] fsl_rio: fix non-standard HID1 register access
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From: Kumar Gala <galak@kernel.crashing.org>
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Date: Thu, 14 Oct 2010 01:17:43 -0500
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To: Kumar Gala <galak@kernel.crashing.org>
Cc: alexandre.bounine@idt.com, linuxppc-dev@lists.ozlabs.org,
	Shaohui Xie <b21989@freescale.com>
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On Oct 14, 2010, at 1:14 AM, Kumar Gala wrote:

>=20
> On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
>=20
>> From: Li Yang <leoli@freescale.com>
>>=20
>> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>> Also fixes magic number.
>>=20
>> Signed-off-by: Li Yang <leoli@freescale.com>
>> Signed-off-by: Shaohui Xie <b21989@freescale.com>
>> ---
>> arch/powerpc/sysdev/fsl_rio.c |    9 ++++++---
>> 1 files changed, 6 insertions(+), 3 deletions(-)
>>=20
>> diff --git a/arch/powerpc/sysdev/fsl_rio.c =
b/arch/powerpc/sysdev/fsl_rio.c
>> index 4127636..dfff3b7 100644
>> --- a/arch/powerpc/sysdev/fsl_rio.c
>> +++ b/arch/powerpc/sysdev/fsl_rio.c
>> @@ -1537,9 +1537,12 @@ int fsl_rio_setup(struct platform_device *dev)
>> #ifdef CONFIG_E500
>> 	saved_mcheck_exception =3D ppc_md.machine_check_exception;
>> 	ppc_md.machine_check_exception =3D fsl_rio_mcheck_exception;
>> -#endif
>> -	/* Ensure that RFXE is set */
>> -	mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
>> +
>> +#ifndef CONFIG_PPC_E500MC
>> +	/* Ensure that RFXE is set on e500 v1/v2 */
>> +	mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | HID1_RFXE));
>> +#endif /* !PPC_E500MC */
>> +#endif /* E500 */
>=20
> I've never really been happy with this code.  We really should set =
HID1_RFXE in cpu_setup_fsl_booke.S instead.

We should also change this so we just call fsl_rio_mcheck_exception() =
from machine_check_e500 & machine_check_e500mc and get rid of this =
ppc_md.machine_check_exception manipulation.

- k=