Hello all,

I am Sewook Wee at Stanford University.
For the research purpose, I am hacking the linux kernel (version 2.4.30) for
The PPC405 in Virtex II Pro Xilinx FPGA.
What I want to do is make Data Cache policy to be write-through, not
write-back.
I changed the DCWR Value in the arch/ppc/mm/44x_mmu.c, but seems it does not
work.

I hope some of you have decent idea to make it happen.

Thanks.



--
Sewook Wee
  weese@stanford.edu
  Computer System Laboratory
  Stanford University