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From: Kumar Gala <kumar.gala@freescale.com>
Date: Wed, 6 Apr 2005 14:16:15 -0500
To: "Chris Friesen" <cfriesen@nortel.com>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: question on inline assembly and long long values
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I'm having a similar need (for a different purpose), this post might be=20=

useful:

http://gcc.gnu.org/ml/gcc/2005-04/msg00283.html

- kumar

On Apr 6, 2005, at 1:26 PM, Chris Friesen wrote:

> I want to retrieve the msr (which is 64-bits) on a 970 when running in
> 32-bit mode.=A0 I have the following bit of code that seems to work, =
but
> when looking at the code it always seems to use a suboptimal register
> for the low word, and then it ends up having to copy it to the right
> register to create a long long register pair.
>
> static inline unsigned long long get_msr()
>  {
>  =A0=A0=A0=A0=A0=A0=A0 union {
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 struct {
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
unsigned long low;
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
unsigned long high;
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 } words;
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 unsigned long long val;
>  =A0=A0=A0=A0=A0=A0=A0 } val;
>  =A0=A0=A0=A0=A0=A0=A0=A0 asm volatile( \
>  =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 "mfmsr=A0 =
%0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 \n\t" \
>  =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 "rldicl =
%1,%0,32,32=A0=A0=A0=A0=A0=A0 \n\t" \
>  =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 "rldicl =
%0,%0,0,32=A0=A0=A0=A0=A0=A0=A0 \n\t" \
>  =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 : "=3Dr" =
(val.words.low), "=3Dr" (val.words.high));
> =A0=A0=A0=A0=A0=A0=A0 return val.val;
>  }
>
> Using this code, the optimised assembly output of
>
> =A0=A0=A0=A0=A0=A0=A0 unsigned long long a =3D asdf();
>  =A0=A0=A0=A0=A0=A0=A0 unsigned long long b =3D asdf();
>
> is
>
> =A0=A0=A0=A0=A0=A0=A0 mfmsr=A0 5
>  =A0=A0=A0=A0=A0=A0=A0 rldicl 0,5,32,32
>  =A0=A0=A0=A0=A0=A0=A0 rldicl 5,5,0,32
>  =A0=A0=A0=A0=A0=A0=A0 mr 6,0
>  =A0=A0=A0=A0=A0=A0=A0 mfmsr=A0 7
>  =A0=A0=A0=A0=A0=A0=A0 rldicl 9,7,32,32
>  =A0=A0=A0=A0=A0=A0=A0 rldicl 7,7,0,32
>  =A0=A0=A0=A0=A0=A0=A0 mr 8,9
>
> I figure it should have been able to use registers 6/8 in the first
> place, and save the extra moves.
>
> Is there any way to help gcc optimise this?
>
>
>
> Chris
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