From: Ritesh Harjani (IBM) <ritesh.list@gmail.com>
To: Gaurav Batra <gbatra@linux.ibm.com>, maddy@linux.ibm.com
Cc: linuxppc-dev@lists.ozlabs.org, sbhat@linux.ibm.com,
vaibhav@linux.ibm.com, donettom@linux.ibm.com,
harshpb@linux.ibm.com, stable@vger.kernel.org
Subject: Re: [PATCH v4] powerpc/pseries/iommu: Add TCEs for 16GB pages when RAM is pre-mapped
Date: Tue, 04 Aug 2026 19:36:47 +0530 [thread overview]
Message-ID: <33wum13c.ritesh.list@gmail.com> (raw)
In-Reply-To: <db0911c1-0be3-4b8e-be0a-ea02a76cf122@linux.ibm.com>
Gaurav Batra <gbatra@linux.ibm.com> writes:
> Hello Ritesh,
>
<...>
> As you correctly pointed out in the enable_ddw() code, this could lead
> to EEH if
> pmemory is assigned to the same power-of-2 chunk as (RAM + 16GB pages).
>
> It would be better to set device bus_dma_limit to pseries_ddw_max_ram
> and *not*
>
> max_ram_pages, which in this case is the size of the DDW.
>
> I will fix this in my next version of the patch.
Sure, thanks for veryfing that claim.
> Please let me know if you have any other concerns. I will incorporate all those changes in the next version of the patch.
>
Nothing else. Otherwise, it looks good.
> Thanks a lot for spending time and checking this code in deep.
No issues. Thanks for fixing it!
-ritesh
prev parent reply other threads:[~2026-08-04 14:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-27 22:14 [PATCH v4] powerpc/pseries/iommu: Add TCEs for 16GB pages when RAM is pre-mapped Gaurav Batra
2026-07-30 1:35 ` Ritesh Harjani
2026-08-02 16:51 ` Gaurav Batra
2026-08-04 14:06 ` Ritesh Harjani [this message]
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