From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Fri, 14 Mar 2008 14:21:18 +0000 (GMT) From: Angelo Subject: RE: I2S driver To: "Pedro Luis D. L." In-Reply-To: MIME-Version: 1.0 Content-Type: text/html; charset=utf-8 Message-ID: <342534.14911.qm@web23107.mail.ird.yahoo.com> Cc: Linuxppc-embedded@ozlabs.org Reply-To: s104259@yahoo.it List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: ,
Hi Pedro, i'm Angelo.

You just send me this mail:
= start mail

As I told you, here is the configuration routine for the = I2S module.
Please, notice that this module whas built to work on the o= ld 2.6.16
kernel and old dma driver:

static int I2S_setup(void) = {
    int i;
//     u32 val32;
 = ;   // CDM
    struct mpc52xx_cdm __iomem *cdm;=
//
//     /* GPIO Modification */
  &nb= sp; struct mpc52xx_gpio __iomem *gpio;

//     /* END = GPIO Modification */
//
    cdm =3D ioremap(MPC52xx_P= A(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
    gpio =3D io= remap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
//
 =    switch(psc_num) {
        cas= e 1:
            initiator_t= x =3D SDMA_INITIATOR_PSC1_TX;
        &nbs= p;   initiator_rx =3D SDMA_INITIATOR_PSC1_RX;
  &nbs= p;         break;
     = ;   case 2:
          =   initiator_tx =3D SDMA_INITIATOR_PSC2_TX;
     = ;       initiator_rx =3D SDMA_INITIATOR_PSC2_RX;            break;
 =        default:
      =       panic("snd-I2Smgt.o: invalid value for psc_num(%i)\n",psc_num);
          &nb= sp; break;
    };

    /* 528MHz/(0x= 1f+1)=3D16.5 MHz */
    cdm->mclken_div_psc2 =3D 0x800= 1; // Mhz MCLK ( Khz * )
    psc->command =3D (MPC52xx_PSC_= TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
    /* PSC2 CODEC w= ith Master Clock */
    gpio->port_config |=3D 0x70;    /* PSC2 clock enable */
    cdm->= clk_enables |=3D 0x40;

    // PSC reset
 &nbs= p;  psc->command =3D MPC52xx_PSC_RST_RX;
    psc-= >command =3D MPC52xx_PSC_RST_TX;
     psc->com= mand =3D MPC52xx_PSC_SEL_MODE_REG_1;
     psc->co= mmand =3D MPC52xx_PSC_RST_ERR_STAT;


    // PSC se= tup I2S
    psc->mode =3D 0;
    psc= ->rfalarm =3D RX_ALARM;
     psc->tfalarm =3D = TX_ALARM;
    psc->rfcntl =3D RX_GRAN;
  =    psc->tfcntl =3D TX_GRAN;
    psc->mpc5= 2xx_psc_imr =3D 0x0000;

    psc->sicr =3D 0x0FE00000;
 &n= bsp;  psc->ctur =3D 0x1f; //Frame length 0x17

  &n= bsp; psc->ccr =3D 0x3f5D; //LRCK  KHz, BitCLK  MHz  0x3f0= 5!

//     psc->sicr |=3D /* DELAY_TIME_SLOT |*/ MU= LTIWD_ENABLE | CLK_POL_RISING;
//    
//   =   psc->sicr |=3D GEN_CLK_INT;

    psc->com= mand =3D MPC52xx_PSC_RST_RX;
    psc->command =3D MPC5= 2xx_PSC_RST_TX;
    psc->command =3D MPC52xx_PSC_SEL_M= ODE_REG_1;
    psc->command =3D MPC52xx_PSC_RST_ERR_ST= AT;
//
//     // setup the sdma tasks
  =   tx_sdma =3D sdma_alloc(PERIODS_HW+1);
    rx_sdma = =3D sdma_alloc(PERIODS_HW+1);

    if (!tx_sdma || !rx= _sdma) {
        printk("sdma_alloc failed\n");
        return -ENOMEM;
&n= bsp;   }
//
//     sdma_gen_bd_rx_init(rx_s= dma, (phys_addr_t)&(psc->rfdata),
PERIODSIZE_HW, initiator_rx, 6)= ;
    sdma_gen_bd_rx_init(0, rx_sdma, (phys_addr_t)&(= psc->rfdata),
initiator_rx, 6, PERIODSIZE_HW);
//   &nbs= p; sdma_gen_bd_tx_init(tx_sdma, (phys_addr_t)&(psc->tfdata),
PERI= ODSIZE_HW, initiator_tx, 6);
    sdma_gen_bd_tx_init(0, t= x_sdma, (phys_addr_t)&(psc->tfdata),
initiator_tx, 6);

&nb= sp;   printk("txtask is %d rxtask is %d\n", tx_sdma->tasknum,<= br>rx_sdma->tasknum);
//
    // prepare the ring b= uffers
    for(i=3D0;itasknum %d\n", sdma_irq(rx_sdma), M= PC52xx_SDMA_IRQ_BASE +
rx_sdma->tasknum);
    if (r= equest_irq(sdma_irq(rx_sdma), I2S_rx_irq, 0, "SPI rx dma",
NULL)) {
        printk(KERN_ERR "SPI: SDMA rx i= rq allocation failed\n");
        return -= EINVAL;
    } else printk("SPI: SDA rx irq allocation suc= ceded\n");
    if (request_irq(sdma_irq(tx_sdma), I2S_tx_= irq, 0, "SPI tx dma",
NULL)) {
        = printk(KERN_ERR "SPI: SDMA tx irq allocation failed\n");
  &nb= sp;     return -EINVAL;
    } else printk(= "SPI: SDA tx irq allocation succeded\n");
   
//
= //     // clear any pending interrupts
   = sdma_clear_irq(tx_sdma);
    sdma_clear_irq(rx_sdma);//
    printk("Before activating the tasks\n");
// &= nbsp;   // activate the tasks
//     sdma_enabl= e(tx_sdma);
//     sdma_enable(rx_sdma);
//
//     printk("about to enable SPI psc\n");
 &n= bsp;  udelay(100);
//
//     // enable transmitt= er and receiver
    psc->command =3D MPC52xx_PSC_TX_EN= ABLE | MPC52xx_PSC_RX_ENABLE;
// //    psc->command = =3D MPC52xx_PSC_TX_ENABLE;
//
//
// //     I2S_pr= int(__FUNCTION__);
//
// //     pcm1680_read();
//= //         pcm1680_configure(44100= );
// //     pcm1680_read();

    re= turn 0;
};
end mail

I solved my proplems of porting from 2.6.1= 7 to 2.16.22 kernel
version, but in the module static int I2S_setup(voi= d) i found
the sequent problems.

In this piece of code:

s= witch(psc_num) {
        case 1:
 =            initiator_tx =3D SDMA_INITIATOR_PSC1_TX;
         &nb= sp;  initiator_rx =3D SDMA_INITIATOR_PSC1_RX;
    &n= bsp;       break;
     &nbs= p;  case 2:
           = ; initiator_tx =3D SDMA_INITIATOR_PSC2_TX;
     &nbs= p;      initiator_rx =3D SDMA_INITIATOR_PSC2_RX;
&nb= sp;           break;
  = ;      default:
       = ;     panic("snd-I2Smgt.o: invalid value for psc_num
(%i)= \n",psc_num);
            b= reak;
    };

This define are undeclared:
SDMA_I= NITIATOR_PSC1_TX
SDMA_INITIATOR_PSC1_RX
SDMA_INITIATOR_PSC2_TX
SDM= A_INITIATOR_PSC2_RX

so perhaps i don't have some header files.

Also this variable are undefined:
psc_num, tx_sdma, rx_sd= ma.

And where i can found this function:
- sdma_gen_bd_rx_init- sdma_gen_bd_tx_init

However there are some other errors like:
= //
// prepare the ring buffers
    for(i=3D0;itasknum= %d\n", sdma_irq(rx_sdma), MPC52xx_SDMA_IRQ_BASE +
 rx_sdma->tas= knum);
    if (request_irq(sdma_irq(rx_sdma), I2S_rx_irq,= 0, "SPI rx dma", NULL))
 {
.....
I think there are some mist= akes in your copy and paste operation, so
i don't know how solve it.
Thanks for help.

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