From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
To: Michael Ellerman <mpe@ellerman.id.au>,
Michael Neuling <mikey@neuling.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
"Shreyas B. Prabhu" <shreyasbp@gmail.com>,
Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>,
Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>,
Anton Blanchard <anton@samba.org>,
Balbir Singh <bsingharora@gmail.com>,
Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>,
Nicholas Piggin <npiggin@gmail.com>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
"Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
Subject: [v2 PATCH 1/4] powernv: Move CPU-Offline idle state invocation from smp.c to idle.c
Date: Mon, 20 Mar 2017 21:24:15 +0530 [thread overview]
Message-ID: <358fc68275a4986d2e112418aea447f49f644f7e.1490024477.git.ego@linux.vnet.ibm.com> (raw)
In-Reply-To: <cover.1490024477.git.ego@linux.vnet.ibm.com>
In-Reply-To: <cover.1490024477.git.ego@linux.vnet.ibm.com>
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
Move the piece of code in powernv/smp.c::pnv_smp_cpu_kill_self() which
transitions the CPU to the deepest available platform idle state to a
new function named pnv_cpu_offline() in powernv/idle.c. The rationale
behind this code movement is that the data required to determine the
deepest available platform state resides in powernv/idle.c.
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/cpuidle.h | 1 +
arch/powerpc/platforms/powernv/idle.c | 25 +++++++++++++++++++++++++
arch/powerpc/platforms/powernv/powernv.h | 2 --
arch/powerpc/platforms/powernv/smp.c | 18 ++----------------
4 files changed, 28 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h
index 1557315..4649ca0 100644
--- a/arch/powerpc/include/asm/cpuidle.h
+++ b/arch/powerpc/include/asm/cpuidle.h
@@ -46,6 +46,7 @@
extern u64 pnv_first_deep_stop_state;
+unsigned long pnv_cpu_offline(unsigned int cpu);
int validate_psscr_val_mask(u64 *psscr_val, u64 *psscr_mask, u32 flags);
static inline void report_invalid_psscr_val(u64 psscr_val, int err)
{
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 4ee837e..419edff 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -266,6 +266,31 @@ static void power9_idle(void)
u64 pnv_deepest_stop_psscr_mask;
/*
+ * pnv_cpu_offline: A function that puts the CPU into the deepest
+ * available platform idle state on a CPU-Offline.
+ */
+unsigned long pnv_cpu_offline(unsigned int cpu)
+{
+ unsigned long srr1;
+
+ u32 idle_states = pnv_get_supported_cpuidle_states();
+
+ if (cpu_has_feature(CPU_FTR_ARCH_300)) {
+ srr1 = power9_idle_stop(pnv_deepest_stop_psscr_val,
+ pnv_deepest_stop_psscr_mask);
+ } else if (idle_states & OPAL_PM_WINKLE_ENABLED) {
+ srr1 = power7_winkle();
+ } else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
+ (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) {
+ srr1 = power7_sleep();
+ } else {
+ srr1 = power7_nap(1);
+ }
+
+ return srr1;
+}
+
+/*
* Power ISA 3.0 idle initialization.
*
* POWER ISA 3.0 defines a new SPR Processor stop Status and Control
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h
index 6130522..6dbc0a1 100644
--- a/arch/powerpc/platforms/powernv/powernv.h
+++ b/arch/powerpc/platforms/powernv/powernv.h
@@ -18,8 +18,6 @@ static inline void pnv_pci_shutdown(void) { }
#endif
extern u32 pnv_get_supported_cpuidle_states(void);
-extern u64 pnv_deepest_stop_psscr_val;
-extern u64 pnv_deepest_stop_psscr_mask;
extern void pnv_lpc_init(void);
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 8b67e1e..914b456 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -35,6 +35,7 @@
#include <asm/dbell.h>
#include <asm/kvm_ppc.h>
#include <asm/ppc-opcode.h>
+#include <asm/cpuidle.h>
#include "powernv.h"
@@ -140,7 +141,6 @@ static void pnv_smp_cpu_kill_self(void)
{
unsigned int cpu;
unsigned long srr1, wmask;
- u32 idle_states;
/* Standard hot unplug procedure */
local_irq_disable();
@@ -155,8 +155,6 @@ static void pnv_smp_cpu_kill_self(void)
if (cpu_has_feature(CPU_FTR_ARCH_207S))
wmask = SRR1_WAKEMASK_P8;
- idle_states = pnv_get_supported_cpuidle_states();
-
/* We don't want to take decrementer interrupts while we are offline,
* so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9)
* enabled as to let IPIs in.
@@ -184,19 +182,7 @@ static void pnv_smp_cpu_kill_self(void)
kvmppc_set_host_ipi(cpu, 0);
ppc64_runlatch_off();
-
- if (cpu_has_feature(CPU_FTR_ARCH_300)) {
- srr1 = power9_idle_stop(pnv_deepest_stop_psscr_val,
- pnv_deepest_stop_psscr_mask);
- } else if (idle_states & OPAL_PM_WINKLE_ENABLED) {
- srr1 = power7_winkle();
- } else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
- (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) {
- srr1 = power7_sleep();
- } else {
- srr1 = power7_nap(1);
- }
-
+ srr1 = pnv_cpu_offline(cpu);
ppc64_runlatch_on();
/*
--
1.9.4
next prev parent reply other threads:[~2017-03-20 15:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-20 15:54 [v2 PATCH 0/4] powernv:idle: Fixes for CPU-Hotplug on POWER DD1.0 Gautham R. Shenoy
2017-03-20 15:54 ` Gautham R. Shenoy [this message]
2017-03-20 16:35 ` [v2 PATCH 1/4] powernv: Move CPU-Offline idle state invocation from smp.c to idle.c Nicholas Piggin
2017-03-22 5:41 ` Gautham R Shenoy
2017-03-20 15:54 ` [v2 PATCH 2/4] powernv:smp: Add busy-wait loop as fall back for CPU-Hotplug Gautham R. Shenoy
2017-03-20 15:54 ` [v2 PATCH 3/4] powernv:idle: Don't override default/deepest directly in kernel Gautham R. Shenoy
2017-03-20 16:39 ` Nicholas Piggin
2017-03-22 5:43 ` Gautham R Shenoy
2017-03-20 15:54 ` [v2 PATCH 4/4] powernv: Recover correct PACA on wakeup from a stop on P9 DD1 Gautham R. Shenoy
2017-03-20 16:59 ` Nicholas Piggin
2017-03-22 3:29 ` Nicholas Piggin
2017-03-22 5:58 ` Gautham R Shenoy
2017-03-22 8:30 ` Nicholas Piggin
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